JAJSLE9A March   2023  – April 2024 OPA928

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: 4.5V ≤ VS < 8V
    6. 5.6 Electrical Characteristics: 8V ≤ VS ≤ 16V
    7. 5.7 Electrical Characteristics: 16V < VS ≤ 36V
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Guard Buffer
      2. 6.3.2 Input Protection
      3. 6.3.3 Thermal Protection
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 EMI Rejection
      6. 6.3.6 Common-Mode Voltage Range
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Contamination Considerations
      2. 7.1.2 Guarding Considerations
      3. 7.1.3 Single-Supply Considerations
      4. 7.1.4 Humidity Considerations
      5. 7.1.5 Dielectric Relaxation
      6. 7.1.6 Shielding
    2. 7.2 Typical Applications
      1. 7.2.1 High-Impedance Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Transimpedance Amplifier
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Input Bias
          2. 7.2.2.2.2 Offset Voltage
          3. 7.2.2.2.3 Stability
          4. 7.2.2.2.4 Noise
      3. 7.2.3 Improved Diode Limiter
      4. 7.2.4 Instrumentation Amplifier
    3. 7.3 Power-Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 8.1.1.3 TI のリファレンス・デザイン
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Improved Diode Limiter

Low leakage current designs require special considerations. As described in Section 7.1.5, polarization of dielectric material and capacitors can have severe adverse effects on low leakage measurements. Even small electric potentials can polarize dielectrics enough to result in residual leakage current greater than the input bias current of the OPA928. Depending on the severity, the dielectric relaxation of insulators and dielectric absorption of capacitance at the input can make measurements unreliable for a prolonged time period.

Dielectric polarization can be created unintentionally in some common applications. In particular, the transimpedance amplifier configuration is prone to dielectric polarization. The dynamic range of interfacing sensors can vary widely, and a current input beyond the expected range can cause the output to slam to the supply rail. When the output is slammed, the amplifier is unable to maintain a virtual short and the high impedance node voltage increases significantly. The voltage increase not only causes current flow into the input, but also polarizes the material enough to create dielectric relaxation related leakage.

A diode clamp in the feedback path can be used to limit the output voltage swing and prevent the op amp from saturating. The leakage from the diode, however, can be quite large and is unusable in low leakage circuits. A better design can be made using the internal guard buffer of the OPA928. A Zener diode can be connected from the output to the guard, bypassing the high impedance node altogether as shown in Figure 7-16.

OPA928 Improved Diode Limiter Figure 7-16 Improved Diode Limiter

During normal operation, the small leakage current from the Zener diode, ILeakage, is handled by the internal guard buffer as shown in Figure 7-17. In the overrange condition shown in Figure 7-18, the Zener diode begins to conduct more current, IR, and creates a voltage drop of across the 1kΩ resistor. The voltage that develops at the guard pin causes the internal protection diodes to conduct and source the remaining sensor current, ISENSOR. The guarded diode limiter circuit regulates the voltage at the inverting node even during an overrange condition.

OPA928 Guarded Diode Limiter During Normal OperationFigure 7-17 Guarded Diode Limiter During Normal Operation
OPA928 Guarded Diode Limiter During OverrangeFigure 7-18 Guarded Diode Limiter During Overrange