JAJSNF3A April 2022 – August 2022 PCM6120-Q1
PRODUCTION DATA
This section provides a typical EVM I2C register control script that shows how to set up the PCM6120-Q1 in a two-channel analog microphone recording mode with differential inputs.
# Key: w 9C XX YY ==> write to I2C address 0x9C, to register 0xXX, data 0xYY
# # ==> comment delimiter
#
# The following list gives an example sequence of items that must be executed in the time
# between powering the device up and reading data from the device. There are
# other valid sequences depending on which features are used.
#
# See the PCM6120-Q1EVM user guide for jumper settings and audio connections.
#
# Differential 2-channel : INP1/INM1 - Ch1, INP2/INM2 - Ch2
# FSYNC = 44.1 kHz (output data sample rate), BCLK = 11.2896 MHz (BCLK/FSYNC = 256)
################################################################
#
#
# Power-up the IOVDD and AVDD power supplies
# Wait for the IOVDD and AVDD power supplies to settle to a steady-state operating voltage range.
# Wait for 1 ms.
#
# Wake-up the device with an I2C write into P0_R2 using an internal AREG
w 9C 02 81
#
# Enable input Ch-1 and Ch-2 by an I2C write into P0_R115
w 9C 73 C0
#
# Enable ASI output Ch-1 and Ch-2 slots by an I2C write into P0_R116
w 9C 74 C0
#
# Power-up the ADC, MICBIAS, and PLL by an I2C write into P0_R117
w 9C 75 E0
#
# Apply FSYNC = 44.1 kHz and BCLK = 11.2896 MHz and
# Start recording data via the host on the ASI bus with a TDM protocol 32-bits channel wordlength