The design parameters are used with the aforementioned equations to select a nominal target G. When the possible V_REF voltages available in the system are considered, V_REF = 0 V with G = 9 is found to result in a V_MID1 value of 1.8 V, well within the input common-mode range of a 3.3‑V rail-to-rail amplifier such as the OPA392. When the corresponding RES11A90 is employed, the loss terms I_STATIC1 and I_STATIC2 are nominally 1.80 mA and 1.77 mA for I_LOAD = 300 mA, resulting in an effective floor of 1.77 mA for I_LOAD. For simplicity, the error contributions of the INA stage V_OS and I_B are ignored.

For the INA stage, an integrated TI instrumentation amplifier (IA) can be used. Alternatively, a discrete approach can be implemented using another RES11A device or devices, and one or more op amps. For this example, an IA stage is constructed with two channels of a OPA4392 and a second RES11A90 (R_IN3, R_G3, R_IN4, and R_G4). This stage is in turn cascaded with a difference amplifier stage, constructed with the third amplifier channel and a RES11A00 (R_IN5, R_G5, R_IN6, and R_G6). The level-shifting stage gain of 10^–1, multiplied by the instrumentation amplifier stage gain of 10, results in an effective unity-gain transfer function for V_SHUNT. Therefore, the differential output voltage for this stage is approximately 0.3 V, with amplifier outputs of 1.936 V and 1.634 V. After the final difference amplifier stage gain of G = 10, the common-mode voltage drops out and the maximum value of the resulting V_OUT is nominally 3.0 V, compatible with a single-ended 3.3‑V ADC such as the ADS7046. If desired, the fourth channel of the OPA4392 can be used to buffer this output signal and serve as a dedicated ADC driver.

Figure 8-7 High-Side Current Shunt Common-Mode Shifting Circuit