JAJSQ47I october   1995  – april 2023 SN54AHC240 , SN74AHC240

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 説明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics, VCC = 3.3 V ±0.3 V
    7. 6.7 Switching Characteristics, VCC = 5 V ±0.5 V
    8. 6.8 Noise Characteristics
    9. 6.9 Operating Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Power Supply Recommendations
    2. 9.2 Layout
      1. 9.2.1 Layout Guidelines
        1. 9.2.1.1 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • NS|20
  • N|20
  • DW|20
  • PW|20
サーマルパッド・メカニカル・データ
発注情報

8.1 Overview

The 'AHC240 devices are organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.