JAJST34A June   2003  – February 2024 SN74AHC4066

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics
    7. 5.7  Switching Characteristics
    8. 5.8  Switching Characteristics
    9. 5.9  Analog Switching Characteristics
    10. 5.10 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|14
  • RGY|14
  • DB|14
  • DGV|14
  • PW|14
  • N|14
  • NS|14
サーマルパッド・メカニカル・データ
発注情報

5.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(2)
MIN MAX UNIT
VCC Supply voltage

1

(1)		 5.5 V
VIH High-level input voltage, control inputs VCC = 2V 1.5 V
VCC = 2.3V to 2.7V VCC × 0.7
VCC = 3V to 3.6V VCC × 0.7
VCC = 4.5V to 5.5V VCC × 0.7
VIL Low-level input voltage, control inputs VCC = 2V 0.5 V
VCC = 2.3V to 2.7V VCC × 0.3
VCC = 3V to 3.6V VCC × 0.3
VCC = 4.5V to 5.5V VCC × 0.3
VI Control input voltage 0 5.5 V
VI/O Input/output voltage 0 VCC V
∆t/∆v Input transition rise and fall time VCC = 2.3V to 2.7V 200 ns/V
VCC = 3V to 3.6V 100
VCC = 4.5V to 5.5V 20
TA Operating free-air temperature –40 85 °C
(1) With supply voltages at or below 2V, the analog switch on-state resistance becomes very nonlinear. Only digital signals should be transmitted at these low supply voltages.
(2) All unused inputs of the device must be held at VCC or GND for proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs.