SCLS520E August   2003  – January 2015 SN74LV4051A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics VCC = 3.3 V ± 0.3 V
    7. 6.7 Switching Characteristics VCC = 5 V ± 0.5 V
    8. 6.8 Analog Switch Characteristics
    9. 6.9 Operating Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • DW|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

D, DW, or PW Package
16 Pins
Top View
po_cls520.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
Y4 1 I(1) Input to mux
Y6 2 I(1) Input to mux
COM 3 O(1) Output of mux
Y7 4 I(1) Input to mux
Y5 5 I(1) Input to mux
INH 6 I(1) Enables the outputs of the device. Logic low level with turn the outputs on, high level will turn them off.
GND 7 — Ground
GND 8 — Ground
C 9 I Selector line for outputs (see Device Functional Modes for specific information)
B 10 I Selector line for outputs (see Device Functional Modes for specific information)
A 11 I Selector line for outputs (see Device Functional Modes for specific information)
Y3 12 I(1) Input to mux
Y0 13 I(1) Input to mux
Y1 14 I(1) Input to mux
Y2 15 I(1) Input to mux
Vcc 16 I Device power input
(1) These I/O descriptions represent the device when used as a multiplexer, when this device is operated as a demultiplexer pins Y0-Y7 may be considered outputs (O) and the COM pin may be considered inputs (I).

ld_cls520.gifFigure 1. Logic Diagram (Positive Logic)