JAJSE50 November   2017 TLA2021 , TLA2022 , TLA2024

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      システム監視アプリケーションの例
  4. 改訂履歴
  5. 概要(続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 I2C Timing Requirements
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Multiplexer
      2. 9.3.2 Analog Inputs
      3. 9.3.3 Full-Scale Range (FSR) and LSB Size
      4. 9.3.4 Voltage Reference
      5. 9.3.5 Oscillator
      6. 9.3.6 Output Data Rate and Conversion Time
    4. 9.4 Device Functional Modes
      1. 9.4.1 Reset and Power-Up
      2. 9.4.2 Operating Modes
        1. 9.4.2.1 Single-Shot Conversion Mode
        2. 9.4.2.2 Continuous-Conversion Mode
    5. 9.5 Programming
      1. 9.5.1 I2C Interface
        1. 9.5.1.1 I2C Address Selection
        2. 9.5.1.2 I2C Interface Speed
        3. 9.5.1.3 Serial Clock (SCL) and Serial Data (SDA)
        4. 9.5.1.4 I2C Data Transfer Protocol
        5. 9.5.1.5 Timeout
        6. 9.5.1.6 I2C General-Call (Software Reset)
      2. 9.5.2 Reading and Writing Register Data
        1. 9.5.2.1 Reading Conversion Data or the Configuration Register
        2. 9.5.2.2 Writing the Configuration Register
      3. 9.5.3 Data Format
  10. 10Register Maps
    1. 10.1 Conversion Data Register (RP = 00h) [reset = 0000h]
      1. Table 6. Conversion Data Register Field Descriptions
    2. 10.2 Configuration Register (RP = 01h) [reset = 8583h]
      1. Table 7. Configuration Register Field Descriptions
  11. 11Application and Implementation
    1. 11.1 Application Information
      1. 11.1.1 Basic Interface Connections
      2. 11.1.2 Connecting Multiple Devices
      3. 11.1.3 Single-Ended Signal Measurements
      4. 11.1.4 Analog Input Filtering
      5. 11.1.5 Duty Cycling To Reduce Power Consumption
      6. 11.1.6 I2C Communication Sequence Example
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curve
  12. 12Power Supply Recommendations
    1. 12.1 Power-Supply Sequencing
    2. 12.2 Power-Supply Decoupling
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14デバイスおよびドキュメントのサポート
    1. 14.1 デバイス・サポート
      1. 14.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 14.2 関連リンク
    3. 14.3 ドキュメントの更新通知を受け取る方法
    4. 14.4 コミュニティ・リソース
    5. 14.5 商標
    6. 14.6 静電気放電に関する注意事項
    7. 14.7 Glossary
  15. 15メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

I2C Interface

The TLA202x use an I2C-compatible (inter-integrated circuit) interface for serial communication. I2C is a 2-wire, open-drain communication interface that allows communication of a master device with multiple slave devices on the same bus through the use of device addressing. Each slave device on an I2C bus must have a unique address. Communication on the I2C bus always takes place between two devices: one acting as the master and the other as the slave. Both the master and slave can receive and transmit data, but the slave can only read or write under the direction of the master. The TLA202x always act as I2C slave devices.

An I2C bus consists of two lines: SDA and SCL. SDA carries data and SCL provides the clock. Devices on the I2C bus drive the bus lines low by connecting the lines to ground; the devices never drive the bus lines high. Instead, the bus wires are pulled high by pullup resistors; thus, the bus wires are always high when a device is not driving the lines low. As a result of this configuration, two devices do not conflict. If two devices drive the bus simultaneously, there is no driver contention.

See the I2C-Bus Specification and User Manual from NXP Semiconductors™ for more details.