SLVSAD4B August   2010  – April 2015 TPS22934

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: VIN = 3.6 V
    7. 6.7  Switching Characteristics: VIN = 2.5 V
    8. 6.8  Switching Characteristics: VIN = 1.8 V
    9. 6.9  Switching Characteristics: VIN = 1.5 V
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON and OFF Control
      2. 8.3.2 Undervoltage Lockout
      3. 8.3.3 Quick Output Discharge
    4. 8.4 Device Functional Modes
  9. Applications and Implementation
    1. 9.1 Application Information
      1. 9.1.1 VIN to VOUT Voltage Drop
      2. 9.1.2 Input Capacitor
      3. 9.1.3 Output Capacitor
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Capacitor
        2. 9.2.2.2 Output Capacitor
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance.

11.2 Layout Example

Figure 32 shows an example for these devices. Notice the connection to system ground between the VOUT Bypass Capacitor ground and the GND pin of the load switch, this creates a ground barrier which helps to reduce the ground noise seen by the device.

TPS22934 layout_slvsci7.gifFigure 32. Recommended Layout Example

11.3 Thermal Considerations

The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use the following equation as a guideline:

Equation 2. TPS22934 eq_thrm_slvsci4.gif

where

  • PD(max) = maximum allowable power dissipation
  • TJ(max) = maximum allowable junction temperature
  • TA = ambient temperature of the device
  • θJA = junction to air thermal impedance. See the Thermal Information section. This parameter is highly dependent upon board layout.