JAJSRT8A October 2023 – March 2024 TPS25751
PRODUCTION DATA
The TPS25751D has internal controls for internal FETs (GATE_VSYS and GATE_VBUS as shown in Figure 8-13) that require that VBUS_IN be above VVBUS_UVLO before being able to enable the sink path. Figure 8-13 shows a diagram of the sink path. When a sink path is enabled, the circuitry includes a slew rate control loop to ensure that external switches do not turn on too quickly (SS). The TPS25751D senses the PPHV and VBUS voltages to control the gate voltages to enable or disable the FETs.
The sink-path control includes overvoltage protection (OVP) and reverse current protection (RCP).