JAJS194E January   2007  – June 2019 TPS40077

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      アプリケーション概略図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Minimum Pulse Duration
      2. 7.3.2  Slew Rate Limit On VDD
      3. 7.3.3  Setting The Switching Frequency (Programming The Clock Oscillator)
      4. 7.3.4  Loop Compensation
      5. 7.3.5  Shutdown and Sequencing
      6. 7.3.6  Boost and LVBP Bypass Capacitance
      7. 7.3.7  Internal Regulators
      8. 7.3.8  Power Dissipation
      9. 7.3.9  Boost Diode
      10. 7.3.10 Synchronous Rectifier Control
    4. 7.4 Programming
      1. 7.4.1 Programming The Ramp Generator Circuit and UVLO
      2. 7.4.2 Programming Soft Start
      3. 7.4.3 Programming Short-Circuit Protection
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Buck Regulator 8-V to 16-V Input, 1.8-V Output at 10 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Train Components
            1. 8.2.1.2.1.1  Output Inductor, LOUT
            2. 8.2.1.2.1.2  Output Capacitor, COUT, ELCO and MLCC
            3. 8.2.1.2.1.3  Input Capacitor, CIN ELCO and MLCC
            4. 8.2.1.2.1.4  Switching MOSFET, QSW
            5. 8.2.1.2.1.5  Rectifier MOSFET, QSR
            6. 8.2.1.2.1.6  Timing Resistor, RT
            7. 8.2.1.2.1.7  Feed-Forward and UVLO Resistor, RKFF
            8. 8.2.1.2.1.8  Soft-Start Capacitor, CSS
            9. 8.2.1.2.1.9  Short-Circuit Protection, RILIM and CILIM
            10. 8.2.1.2.1.10 Boost Voltage, CBOOST and DBOOST (Optional)
            11. 8.2.1.2.1.11 Closing the Feedback Loop, RZ1, RP1, RPZ2, RSET1, RSET2, CZ2, CP2, and CPZ1
        3. 8.2.1.3 Application Curves
    3. 8.3 Additional System Examples
  9. Layout
    1. 9.1 Layout Guidelines
  10. 10デバイスおよびドキュメントのサポート
    1. 10.1 デバイス・サポート
      1. 10.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 10.2 ドキュメントのサポート
      1. 10.2.1 関連資料
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 コミュニティ・リソース
    5. 10.5 商標
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 Glossary
  11. 11メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.