JAJSBM7C September   2011  – October 2017 TPS54623

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     効率と負荷電流との関係
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Adjusting the Output Voltage
      4. 7.3.4  Safe Start-up into Pre-Biased Outputs
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Slope Compensation
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Slow Start (SS/TR)
      9. 7.3.9  Power Good (PWRGD)
      10. 7.3.10 Bootstrap Voltage (BOOT) and Low Dropout Operation
      11. 7.3.11 Sequencing (SS/TR)
      12. 7.3.12 Output Overvoltage Protection (OVP)
      13. 7.3.13 Overcurrent Protection
        1. 7.3.13.1 High-side MOSFET Overcurrent Protection
        2. 7.3.13.2 Low-side MOSFET Overcurrent Protection
      14. 7.3.14 Thermal Shutdown
      15. 7.3.15 Small Signal Model for Loop Response
      16. 7.3.16 Simple Small Signal Model for Peak Current Mode Control
      17. 7.3.17 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fixed Frequency PWM Control
      2. 7.4.2 Continuous Current Mode Operation (CCM)
      3. 7.4.3 Light Load Efficiency Operation
      4. 7.4.4 Adjustable Switching Frequency and Synchronization (RT/CLK)
        1. 7.4.4.1 Adjustable Switching Frequency (RT Mode)
        2. 7.4.4.2 Synchronization (CLK mode)
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Fast Transient Considerations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Operating Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Slow Start Capacitor Selection
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Under Voltage Lockout Set Point
        9. 8.2.2.9  Output Voltage Feedback Resistor Selection
          1. 8.2.2.9.1 Minimum Output Voltage
        10. 8.2.2.10 Compensation Component Selection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Estimated Circuit Area
    2. 10.2 Layout Examples
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 開発サポート
      3. 11.1.3 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Sequencing (SS/TR)

Many of the common power supply sequencing methods can be implemented using the SS/TR, EN and PWRGD pins.

The sequential method is illustrated in Figure 20 using two TPS54623 devices. The power good of the first device is coupled to the EN pin of the second device, which enables the second power supply once the primary supply reaches regulation.

TPS54623 startup_lvsb09.gifFigure 20. Sequential Start-Up Sequence

Figure 21 shows the method implementing ratio-metric sequencing by connecting the SS/TR pins of two devices together. The regulator outputs ramp up and reach regulation at the same time. When calculating the slow start time the pullup current source must be doubled in Equation 4.

TPS54623 ratio_stup_lvsb09.gifFigure 21. Ratiometric Start-Up Sequence

Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network of R1 and R2 shown in Figure 22 to the output of the power supply that needs to be tracked or another voltage reference source. Using Equation 5 and Equation 6, the tracking resistors can be calculated to initiate the Vout2 slightly before, after or at the same time as Vout1. Equation 7 is the voltage difference between Vout1 and Vout2.

To design a ratio-metric start up in which the Vout2 voltage is slightly greater than the Vout1 voltage when Vout2 reaches regulation, use a negative number in Equation 5 and Equation 6 for deltaV. Equation 7 results in a positive number for applications where the Vout2 is slightly lower than Vout1 when Vout2 regulation is achieved. .

The deltaV variable is zero volt for simultaneous sequencing. To minimize the effect of the inherent SS/TR to VSENSE offset (Vssoffset, 29 xmV) in the slow start circuit and the offset created by the pullup current source (Iss, 2.3 μA) and tracking resistors, the Vssoffset and Iss are included as variables in the equations.

To ensure proper operation of the device, the calculated R1 value from Equation 5 must be greater than the value calculated in Equation 8.

Equation 5. TPS54623 eq5_r1_lvs949.gif
Equation 6. TPS54623 eq6_r2_lvs949.gif
Equation 7. TPS54623 eq7_dv_lvs949.gif
Equation 8. TPS54623 eq_deltav_lvs949.gif
TPS54623 ratiosimul_stup_lvsb09.gifFigure 22. Ratiometric and Simultaneous Start-up Sequence

There are two final considerations when using a resistor divider to the SS/TR pin for simultaneous start-up. First, as described in Power Good (PWRGD), for the PWRGD output to be active the SS/TR voltage must be above 1.4 V. The external divider may prevent the SS/TR voltage from charging above the threshold. For the SS/TR pin to charge above the threshold, an external MOSFET may be needed to disconnect the resistor divider or modify the resistor divider ratio after start-up is complete. The PWRGD pin of the VOUT(1) converter could be used to turn on or turn off the external MOSFET. Second, a pre-bias on VOUT(1) may prevent VOUT(2) from turning on. When the TPS54623 is enabled, an internal 700-Ω MOSFET at the SS/TR pin turns on to discharge the SS/TR voltage as described in Slow Start (SS/TR). The SS/TR pin voltage must discharge below 20 mV before the TPS54623 starts up. If the upper resistor at the SS/TR pin is too small, the SS/TR pin does not discharge below the threshold, and VOUT(2) does not ramp up. The upper resistor in the SS/TR divider may need to be increased to allow the SS/TR pin to discharge below the threshold.