JAJSRB5A September   2023  – November 2023 TPS7B4256-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Tracker Output Voltage (VOUT)
        1. 6.3.1.1 Output Voltage Equal to Reference Voltage
        2. 6.3.1.2 Output Voltage Less Than the Reference Voltage
        3. 6.3.1.3 Output Voltage Larger Than the Reference Voltage
      2. 6.3.2 Reverse Current Protection
      3. 6.3.3 Undervoltage Lockout
      4. 6.3.4 Thermal Protection
      5. 6.3.5 Current Limit
      6. 6.3.6 Output Short to Battery
      7. 6.3.7 Tracking Regulator With an Enable Circuit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Operation With VIN < 3 V
      4. 6.4.4 Disable With ADJ/EN Control
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Dropout Voltage
      2. 7.1.2 Reverse Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Selection
        2. 7.2.2.2 Feedback Resistor Selection
        3. 7.2.2.3 Feedforward Capacitor
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Package Mounting
        2. 7.4.1.2 Board Layout Recommendations to Improve PSRR and Noise Performance
        3. 7.4.1.3 Power Dissipation and Thermal Considerations
        4. 7.4.1.4 Thermal Performance Versus Copper Area
        5. 7.4.1.5 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

GUID-20230925-SS0I-PNDZ-ZWFS-CTQMKS836CQ3-low.svgFigure 4-1 D Package,8-Pin SOIC(Top View)
GUID-22C6B579-05DA-466B-B616-696C71233696-low.svgFigure 4-2 DDA Package,8-Pin HSOIC(Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME D DDA
ADJ/EN 5 5 I Adjustable/enable input pin. Connect the external reference voltage to this pin. This pin connects to the inverting input of the error amplifier internally. A low signal below VIL disables the device, and a high signal above VIH enables the device. Connect the voltage reference directly, or with a voltage divider to attain output voltages lower than the reference; see the Tracker Output Voltage (VOUT) section for more details. To compensate for line influences, place a 0.1-μF capacitor close to this pin.
FB 4 4 I Feedback pin. This pin is connected to the noninverting input of the error amplifier internally and can be used to control the output voltage. For output voltages equal to or less than the external reference voltage, connect this pin directly to the output pin. To attain output voltage values higher than the reference, use a voltage divider with external feedback resistors; see the Tracker Output Voltage (VOUT) section for more details.
GND 2, 3, 6, 7 6 G GND pin. Connect this pin to a low impedance path to ground.
IN 8 8 I Input power-supply voltage pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to GND, as listed in the Recommended Operating Conditions table. Place the input capacitor as close to the input pin of the device as possible to compensate for line influences.
NC 2, 3, 7 Not internally connected. For best thermal performance, connect these pins to GND.
OUT 1 1 O Regulated output voltage pin. A capacitor is required from OUT to GND for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to GND; see the Recommended Operating Conditions table. Place the output capacitor as close to output of the device as possible.
Thermal Pad Pad Thermal pad. Connect the pad to GND for best possible thermal performance.