The following procedure should be
followed to write data to TUSB1004 I2C registers (refer to
Figure 7-2):
The controller initiates a write operation by generating a
start condition (S), followed by the TUSB1004 7-bit address and
a zero-value “W/R” bit to indicate a write cycle.
The TUSB1004 acknowledges the address
cycle.
The controller presents the register offset within TUSB1004 to be written, consisting of one byte of data,
MSB-first.
The TUSB1004 acknowledges the sub-address
cycle.
The controller presents the first byte of data to be written to
the I2C register.
The TUSB1004 acknowledges the byte
transfer.
The controller may continue presenting additional bytes of data
to be written, with each byte transfer completing with an acknowledge from
the TUSB1004.
The controller terminates the write operation by generating a
stop condition (P).
Figure 7-3 I2C Read Without Repeated
Start
The following procedure should be
followed to read the TUSB1004 I2C registers without a
repeated Start (refer Figure 7-3).
The controller initiates a read operation by generating a start
condition (S), followed by the TUSB1004 7-bit address and a
zero-value “W/R” bit to indicate a read cycle.
The TUSB1004 acknowledges the 7-bit address
cycle.
Following the acknowledge the controller continues sending
clock.
The TUSB1004 transmit the contents of the
memory registers MSB-first starting at register 00h or last read register
offset+1. If a write to the I2C register occurred prior to the
read, then the TUSB1004 shall start at the register offset
specified in the write.
The TUSB1004 waits for either an acknowledge
(ACK) or a not-acknowledge (NACK) from the controller after each byte transfer;
the I2C controller acknowledges reception of each data byte
transfer.
If an ACK is received, the TUSB1004 transmits
the next byte of data as long as controller provides the clock. If a NAK is
received, the TUSB1004 stops providing data and waits for a
stop condition (P).
The controller terminates the write operation by generating a
stop condition (P).
Figure 7-4 I2C Read with Repeated
Start
The following procedure should be
followed to read the TUSB1004 I2C registers with a repeated
Start (refer Figure 7-4).
The controller initiates a read operation by generating a start
condition (S), followed by the TUSB1004 7-bit address and a
zero-value “W/R” bit to indicate a write cycle.
The TUSB1004 acknowledges the 7-bit address
cycle.
The controller presents the register offset within TUSB1004 to be written, consisting of one byte of data,
MSB-first.
The TUSB1004 acknowledges the register offset
cycle.
The controller presents a repeated start condition (Sr).
The controller initiates a read operation by generating a start
condition (S), followed by the TUSB1004 7-bit address and a
one-value “W/R” bit to indicate a read cycle.
The TUSB1004 acknowledges the 7-bit address
cycle.
The TUSB1004 transmit the contents of the
memory registers MSB-first starting at the register offset.
The TUSB1004 shall wait for either an
acknowledge (ACK) or a not-acknowledge (NACK) from the controller after each
byte transfer; the I2C controller acknowledges reception of each data
byte transfer.
If an ACK is received, the TUSB1004 transmits
the next byte of data as long as controller provides the clock. If a NAK is
received, the TUSB1004 stops providing data and waits for a
stop condition (P).
The controller terminates the read operation by generating a
stop condition (P).
Figure 7-5 I2C Write Without Data
The following procedure should be
followed for setting a starting sub-address for I2C reads (refer to Figure 7-5).
The controller initiates a write operation by generating a
start condition (S), followed by the TUSB1004 7-bit address and
a zero-value “W/R” bit to indicate a write cycle.
The TUSB1004 acknowledges the address
cycle.
The controller presents the register offset within TUSB1004 to be written, consisting of one byte of data,
MSB-first.
The TUSB1004 acknowledges the register offset
cycle.
The controller terminates the write operation by generating a
stop condition (P).
Note:
After initial power-up, if no
register offset is included for the read procedure (refer to Figure 7-3), then reads
start at register offset 00h and continue byte by byte through the registers
until the I2C controller terminates the read operation. During a read
operation, the TUSB1004 auto-increments the I2C internal
register address of the last byte transferred independent of whether or not an
ACK was received from the I2C controller.