8.6.1.7 AEQ_CONTROL1 Register (Offset = 0x1C) [reset = 0xF0]
AEQ_CONTROL1 is shown in Table 19.
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This register is used to enable adaptive EQ and select between Fast and Full adaptive EQ.
Table 19. AEQ_CONTROL1 Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7-4 |
FULLAEQ_UPPER_EQ |
R/W |
0xF |
Maximum EQ value to check for full AEQ mode
|
3 |
USB3_U1_DISABLE |
R/W |
0x0 |
This field when set will cause entry to U3 instead of U1 when electrical idle is detected.
0x0 = U1 entry after electrical idle.
0x1 = U3 entry after electrical idle.
|
2-1 |
AEQ_MODE |
R/W |
0x0 |
Selects between Fast and 2 Full Adaption modes
0x0 = Fast AEQ.
0x1 = Full AEQ with hits counted at mideye for every EQ.
0x2 = Fast AEQ.
0x3 = Full AEQ with hits counted at mideye only for EQ equal 0.
|
0 |
AEQ_EN |
R/W |
0x0 |
Controls whether or not adaptive EQ for USB downstream facing port is enabled.
0x0 = AEQ disabled
0x1 = AEQ enabled
|