JAJSF74A August   2009  – April 2018 TXB0106-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     代表的な動作回路
  3. 3 概要
    1.     Device Images
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements – VCCA = 1.2 V, TA = 25°C
    7. 6.7  Timing Requirements – VCCA = 1.5 V ± 0.1 V
    8. 6.8  Timing Requirements – VCCA = 1.8 V ± 0.15 V
    9. 6.9  Timing Requirements – VCCA = 2.5 V ± 0.2 V
    10. 6.10 Timing Requirements – VCCA = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics –VCCA = 1.2 V, TA = 25°C
    12. 6.12 Switching Characteristics – VCCA = 1.5 V ± 0.1 V
    13. 6.13 Switching Characteristics – VCCA = 1.8 V ± 0.15 V
    14. 6.14 Switching Characteristics – VCCA = 2.5 V ± 0.2 V
    15. 6.15 Switching Characteristics – VCCA = 3.3 V ± 0.3 V
    16. 6.16 Operating Characteristics
    17. 6.17 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Power Up
      4. 8.3.4 Output Load Considerations
      5. 8.3.5 Enable and Disable
      6. 8.3.6 Pullup or Pulldown Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1 Overview

The TXB0106-Q1 device is a 6-bit, directionless voltage-level translator specifically designed for translating logic voltage levels. The A port is able to accept I/O voltages ranging from 1.2 V to 3.6 V, while the B port can accept I/O voltages from 1.65 V to 5.5 V. The device is a buffered architecture with edge-rate accelerators (one-shots) to improve the overall data rate. This device can only translate push-pull CMOS logic outputs. For open-drain signal translation, see TI’s TXS family of products.