SLVSC86A January   2014  – March 2014 UCD9244-EP

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Terminal Configuration and Functions
    1.     Terminal Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Electrical Characteristics (Continued)
    7. 7.7  ADC Monitoring Intervals And Response Times
    8. 7.8  Hardware Fault Detection Latency
    9. 7.9  PMBus/SMBus/I2C
    10. 7.10 I2C/SMBus/PMBus Timing Requirements
    11. 7.11 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PMBus Interface
      2. 8.3.2  Resistor Programmed PMBus Address Decode
      3. 8.3.3  VID Interface
      4. 8.3.4  Jtag Interface
      5. 8.3.5  Bias Supply Generator (Shunt Regulator Controller)
      6. 8.3.6  Power-On Reset
      7. 8.3.7  External Reset
      8. 8.3.8  ON_OFF_CONFIG
      9. 8.3.9  Output Voltage Adjustment
      10. 8.3.10 Calibration
      11. 8.3.11 Analog Front End (AFE)
      12. 8.3.12 Voltage Sense Filtering
      13. 8.3.13 DPWM Engine
      14. 8.3.14 Rail/Power Stage Configuration
      15. 8.3.15 DPWM Phase Synchronization
      16. 8.3.16 Output Current Measurement
      17. 8.3.17 Current Sense Input Filtering
      18. 8.3.18 Over-Current Detection
      19. 8.3.19 Input Voltage Monitoring
      20. 8.3.20 Input UV Lockout
      21. 8.3.21 Temperature Monitoring
      22. 8.3.22 Auxiliary ADC Input Monitoring
      23. 8.3.23 Soft Start, Soft Stop Ramp Sequence
      24. 8.3.24 Non-Volatile Memory Error Correction Coding
      25. 8.3.25 Data Logging
    4. 8.4 Device Functional Modes
      1. 8.4.1 4-Bit VID Mode
      2. 8.4.2 6-Bit VID Mode
      3. 8.4.3 8-Bit VID Mode
      4. 8.4.4 Current Foldback Mode
  9. Applications and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Automatic System Identification (Auto-ID)
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Digital Compensator
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

ADC Monitoring Intervals And Response Times

The ADC operates in a continuous conversion sequence that measures each rail's output voltage and output current, plus six other variables (input voltage, internal temperature, and four external temperature sensors). The length of the sequence is determined by the number of output rails (NumRails) configured for use. The time to complete the monitoring sampling sequence is give by the formula: tADC_SEQ = tADC × (2 × NumRAILS + 6)

PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tADC ADC single-sample time 3.84 µs
tADC_SEQ ADC sequencer interval Min = 2 × 1 Rail + 6 = 8 samples
Max = 2 × 4 Rails + 6 = 14 samples
30.72 53.76 µs

The most recent ADC conversion results are periodically converted into the proper measurement units (volts, amperes, degrees), and each measurement is compared to its corresponding fault and warning limits. The monitoring operates asynchronously to the ADC, at intervals shown in the table below.

PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tVout Output voltage monitoring interval 200 µs
tIout Output current monitoring interval 200×NRails µs
tVin Input voltage monitoring interval 1 ms
tTEMP Temperature monitoring interval 100 ms
tAUXADC Auxiliary ADC monitoring interval 100 ms

Because the ADC sequencer and the monitoring comparisons are asynchronous to each other, the response time to a fault condition depends on where the event occurs within the monitoring interval and within the ADC sequence interval. Once a fault condition is detected, some additional time is required to determine the correct action based on the FAULT_RESPONSE code, and then to perform the appropriate response. The following table lists the worse-case fault response times.

PARAMETERTEST CONDITIONSTYPMAX
no VID
MAX
/w VID(3)
UNIT
tOVF, tUVF Over-/under-voltage fault response time during normal operation Normal regulation, no PMBus activity,
4 stages enabled
250 800 µs
tOVF, tUVF Over-/under-voltage fault response time, during data logging During data logging to nonvolatile memory(1) 800 1000 µs
tOVF, tUVF Over-/under-voltage fault response time, when tracking or sequencing enable During tracking and soft-start ramp. 400 µs
tOCF, tUCF Over-/under-current fault response time during normal operation Normal regulation, no PMBus activity,
4 stages enabled 75% to 125% current step(2)
100 +
(600 × NRails)
5000 µs
tOCF, tUCF Over-/under-current fault response time, during data logging During data logging to nonvolatile memory 75% to 125% current step 600 +
(600 × NRails)
5000 µs
tOTF Over-temperature fault response time Temperature rise of 10°C/sec, at OT threshold 1.60 sec
t3-State Time to tristate the PWM output after a shutdown is initiated DRIVER_CONFIG = 0x01 5.5 µs
During a STORE_DEFAULT_ALL command, which stores the entire configuration to nonvolatile memory, the fault detection latency can be up to 10 ms.
Because the current measurement is averaged with a smoothing filter, the response time to an over-current condition depends on a combination of the time constant (τ) from Table 6, the recent measurement history, and how much the measured value exceeds the over-current limit.
Controller receiving VID commands at a rate of 4000 msg/sec.