JAJSEJ0E January 2018 – April 2019 TS5MP646
PRODUCTION DATA.
When the TS5MP646 is powered off (VDD = 0 V) the I/Os and digital logic pins of the device remains in a high impedance state. The crosstalk, off-isolation, and leakage will remain within the electrical specifications. This prevents errant voltages from reaching the rest of the system and maintains isolation when the system is powering up.
Figure 20 shows an example system containing a switch without powered-off protection with the following system level scenario.
With powered-off protection, the switch prevents back powering the supply and the switch remains high-impedance. Subsystem B remains protected.
This features has the following system level benefits.