SBAU269C October   2016  – August 2021 ADS8900B

 

  1.   Trademarks
  2. 1EVM Overview
    1. 1.1 ADS8900EVM-PDK Kit Features
    2. 1.2 ADS8900EVM Features
  3. 2Analog Interface
    1. 2.1 ADS8900B Connections and Decoupling
    2. 2.2 ADC Amplifier Input Drive
    3. 2.3 Voltage Reference and VCM Scaling
  4. 3Digital Interface
    1. 3.1 multiSPI™ for ADC Digital I/O
    2. 3.2 I2C Bus for Onboard EEPROM
  5. 4Power Supplies
    1. 4.1 Positive Supply and Test Points
    2. 4.2 Negative Supply
  6. 5ADS8900EVM-PDK Initial Setup
    1. 5.1 Software Installation
    2. 5.2 Default Jumper Settings for Differential Inputs
    3. 5.3 Default Jumpers for Bipolar, Single-Ended Inputs
    4. 5.4 Default Jumpers for Unipolar, Single-Ended Inputs
    5. 5.5 External Source Requirements for ADS8900 Evaluation
  7. 6ADS8900EVM-PDK Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Register Map Configuration Tool
    3. 6.3 Time Domain Display Tool
    4. 6.4 Spectral Analysis Tool
    5. 6.5 Histogram Tool
    6. 6.6 Linearity Analysis Tool
    7. 6.7 ADS8900BEVM Support for ADS8910B and ADS8920B Devices
  8. 7Bill of Materials, PCB Layout, and Schematics
    1. 7.1 Bill of Materials (BOM)
    2. 7.2 PCB Layout
    3. 7.3 Schematics
  9. 8Revision History

Voltage Reference and VCM Scaling

Figure 2-3 shows the voltage reference circuit, output filtering, voltage divider, and buffer circuit. The REF5050 5-V, low-noise, low-drift voltage reference is used here. The voltage reference is connected to the ADC directly to the right of R34 on the VREF node. The filter R36 and C22 are selected for best noise performance and stability. As noted in the REF5050 data sheet, the series resistor R36 is included to keep the capacitor ESR in the desired range. The reference connects to a buffered input on the ADC so the reference does not need to respond to transient current demands. The voltage divider (R36, R31, and R37), and associated jumper (JP3) are used to set the common-mode input for the FDA. The jumper provides the option of changing the common-mode input from 2.5 V to 2.6 V. A common-mode of 2.5 V is midscale for a 0-V to 5-V FDA output swing. Because of output swing limitations, some distortion may occur when the signal swings towards 0 V. The 2.6-V common-mode shifts the signal away from ground to avoid this distortion. The theory behind this approach is documented in the Driving a SAR ADC with a Fully Differential Amplifier video.
GUID-20201201-CA0I-1PWS-THBJ-2G5Z3HMFMBMV-low.gif Figure 2-3 Voltage Reference and VCM Scaling