SBOU229A August   2019  – April 2022 THS6222

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 EVM Specifications
  3. 2Power Connections
    1. 2.1 Split-Supply Operation
    2. 2.2 Single-Supply Operation
  4. 3Input and Output Connections
    1. 3.1 Bias Mode Control Pins
    2. 3.2 IREF Pin Connection
    3. 3.3 Optional VCM Pin Connection
  5. 4Board Layout
  6. 5Schematic and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Bill of Materials
  7. 6Related Documentation
  8. 7Revision History

3.2 IREF Pin Connection

The fine current adjustment (IADJ) pin of the device is controlled using the potentiometer R17 on the board. By default the potentiometer is set to 0 Ω, which yields the maximum quiescent current for each bias mode. By increasing the resistance of the potentiometer, the quiescent current can be reduced to a desired lowered value at the cost of reduced performance.