SCAU059A
January 2024 – March 2024
TDP2004
1
Description
Features
4
1
Evaluation Module Overview
1.1
Introduction
1.2
Kit Contents
1.3
Specification
1.4
Device Information
2
Hardware
2.1
Hardware Configuration
2.1.1
Power
2.1.2
Configuration Jumpers
2.1.3
Rx EQ Configuration
2.1.4
Local I2C Access
2.2
Quick Start Guide
3
Hardware Design Files
3.1
Schematics
3.2
PCB Layouts
3.3
Bill of Materials (BOM)
4
Additional Information
Trademarks
5
Revision History
Features
Supports DisplayPort 2.1 up to 20Gbps - RBR, HBRx, UHBRx
Protocol agnostic linear equalizer supporting most AC coupled interfaces up to 20Gbps
Excellent electrical performance at 20Gbps (10GHz Nyquist):
19dB equalization
1.8V DC linearity, 1.08V AC linearity
-15dB/ -16dB Rx / Tx return loss
-60dB NEXT, -43 dB FEXT cross talk
70 fs low additive RJ with PRBS data
Transparent to DisplayPort 1.4 and 2.1 link training
Single 3.3V supply with low active power: 160mW / channel
Internal voltage regulator provides immunity to supply noise
High linearity easing DP compliance ratio tests
High channel BW resulting excellent linear EQ curves
Pin-strap, I2C or EEPROM programming
18 EQ boost settings
5 flat gain settings
TDP2004: 0°C to 70°C commercial temperature
TDP2004I: –40°C to 85°C industrial temperature
4mm × 6mm, 40 pin WQFN package