SLAA419C October   2009  – April 2019 MSP430F5418 , MSP430F5418A , MSP430F5419 , MSP430F5419A , MSP430F5435 , MSP430F5435A , MSP430F5436 , MSP430F5436A , MSP430F5437 , MSP430F5437A , MSP430F5438 , MSP430F5438A

 

  1.   Migrating From MSP430F541x and MSP430F543x MCUs to MSP430F541xA and MSP430F543xA MCUs
    1.     Trademarks
    2. 1 Device Comparison
    3. 2 Hardware Considerations
      1. 2.1 PMM Settings and Low Power Consumption
      2. 2.2 Operating Frequency vs Supply Voltage
      3. 2.3 Internal Voltage Reference
      4. 2.4 Unified Clock System (UCS) Settings
      5. 2.5 Cyclic Redundancy Check Module
      6. 2.6 Device Errata
    4. 3 Firmware Considerations
      1. 3.1 PMM Default States
        1. 3.1.1 PMM Defaults for F543x
          1. 3.1.1.1 Power Management Module Control Register 0 (PMMCTL0)
          2. 3.1.1.2 Supply Voltage Supervisor and Monitor High-Side Control Register (SVSMHCTL)
          3. 3.1.1.3 Supply Voltage Supervisor and Monitor Low-Side Control Register (SVSMLCTL)
          4. 3.1.1.4 Power Management Module Reset and Interrupt Enable Register (PMMRIE)
        2. 3.1.2 PMM Defaults for F543xA
      2. 3.2 Internal Voltage Reference
        1. 3.2.1 ADC12 Temperature Sensor Equation
      3. 3.3 Bootloader (BSL)
    5. 4 References
  2.   Revision History

2.5 Cyclic Redundancy Check Module

A revisions of F543x silicon add two 'reverse' registers to the Cyclic Redundancy Check (CRC) module: a CRC Data In Reverse Byte (CRCDIRB) register and a CRC Result Reverse register. Data bytes written to CRCDIRB in word mode or the data byte in byte mode are bit-wise reversed before the CRC module adds them to the signature. The bits are reversed in order to enable the MSB bits to be shifted in first to the linear feedback shift register (LFSR) that composes the CRC machine. Similarly, the CRC Result Reverse register provides the byte results of the CRC in bit-wise reversed format.