SLAA419C October   2009  – April 2019 MSP430F5418 , MSP430F5418A , MSP430F5419 , MSP430F5419A , MSP430F5435 , MSP430F5435A , MSP430F5436 , MSP430F5436A , MSP430F5437 , MSP430F5437A , MSP430F5438 , MSP430F5438A

 

  1.   Migrating From MSP430F541x and MSP430F543x MCUs to MSP430F541xA and MSP430F543xA MCUs
    1.     Trademarks
    2. 1 Device Comparison
    3. 2 Hardware Considerations
      1. 2.1 PMM Settings and Low Power Consumption
      2. 2.2 Operating Frequency vs Supply Voltage
      3. 2.3 Internal Voltage Reference
      4. 2.4 Unified Clock System (UCS) Settings
      5. 2.5 Cyclic Redundancy Check Module
      6. 2.6 Device Errata
    4. 3 Firmware Considerations
      1. 3.1 PMM Default States
        1. 3.1.1 PMM Defaults for F543x
          1. 3.1.1.1 Power Management Module Control Register 0 (PMMCTL0)
          2. 3.1.1.2 Supply Voltage Supervisor and Monitor High-Side Control Register (SVSMHCTL)
          3. 3.1.1.3 Supply Voltage Supervisor and Monitor Low-Side Control Register (SVSMLCTL)
          4. 3.1.1.4 Power Management Module Reset and Interrupt Enable Register (PMMRIE)
        2. 3.1.2 PMM Defaults for F543xA
      2. 3.2 Internal Voltage Reference
        1. 3.2.1 ADC12 Temperature Sensor Equation
      3. 3.3 Bootloader (BSL)
    5. 4 References
  2.   Revision History

3.2 Internal Voltage Reference

Figure 7 shows the REF module control register. The REF module is used to source the internal voltage references of the ADC12_A and other analog peripherals in a modular fashion with improved flexibility and stability. The simplest way to port an application that uses the ADC12 module is to set REFMSTR = 0 when initializing the ADC12 registers and to account for the increase in settling time for the internal reference, from 35 µs to 75 µs. The REF module is recommended to be used as the internal reference:

REFCTL0 &= ~REFMSTR;

Table 2. REFMSTR Bit Description

Bit Field Type Reset Description
7 REFMSTR RW 1h REF master control. ADC10_A and CTSD16 devices: Must be written 1.

0b = Reference system controlled by legacy control bits inside the ADC12_A module when available.

1b = Reference system controlled by REFCTL register. Common settings inside the ADC12_A module (if exists) are don't care.
Figure 7. REFCTL0 Register
15 14 13 12 11 10 9 8
Reserved BGMODE REFGENBUSY REFBGACT REFGENACT
r0 r0 r0 r0 r-(0) r-(0) r-(0) r-(0)
7 6 5 4 3 2 1 0
REFMSTR Reserved REFVSEL REFTCOFF Reserved REFOUT REFON
rw-(1) r0 rw-(0) rw-(0) rw-(0) r0 rw-(0) rw-(0)
           Can be modified only when REFGENBUSY = 0.

For information on using the REF module, see the MSP430F5xx and MSP430F6xx Family User's Guide.