SLAU546A March   2014  – October 2021 TRF37A73 , TRF37A75 , TRF37B73 , TRF37B75 , TRF37C73 , TRF37C75 , TRF37D73

 

  1. 1Contents
  2. 2EVM Overview
    1. 2.1 Schematic and BOM
    2. 2.2 TRF37x73/75 EVM Bill of Material
    3. 2.3 General Usage Information
  3. 3EVM Layout
    1. 3.1 Description: Stack up and Material
    2. 3.2 PCB Layers
  4. 4EVM Board Loss
  5. 5Test Block Diagrams
    1. 5.1 Noise Figure
    2. 5.2 Gain and P1dB
    3. 5.3 OIP3
  6. 6Revision History

4 EVM Board Loss

Performance plots of the TRF37x73/75 EVM board are illustrated in Figure 4-1 and Figure 4-2, with the following modifications to the BOM:

  • U1 gain block uninstalled
  • C1 and C2 removed, terminals shorted with strip of copper whose width equaled the trace width.

Figure 4-1 and Figure 4-2 show the S11 and S22 log magnitude responses to a –10-dBm input signal. These measurements were taken with an Agilent E5071B vector network analyzer calibrated from 1 MHz to 6 GHz to the end of the coaxial cables. The coaxial cables were connected directly to J1 and J2 on the EVM board. Port 1 refers to J1 in the schematic and Port 2 refers to J2 in the schematic.

GUID-85CDA1DD-37A8-4A5C-9002-7D430318922D-low.pngFigure 4-1 S11, S22 (Open), U1 Uninstalled
GUID-8A0260DE-BE91-450E-98A0-AFB856ED82A3-low.png Figure 4-2 S11, S22 (Open), U1 and L1 Uninstalled, Copper Tape Replaced C1 and C2