SLAU640B April   2019  – March 2023 ADC12DJ5200SE

 

  1.   Introduction
  2. 1Trademarks
  3. 2Equipment
    1. 2.1 Evaluation Board Feature Identification Summary
    2. 2.2 Required Equipment
  4. 3Setup Procedure
    1. 3.1  Install the High Speed Data Converter (HSDC) Pro Software
    2. 3.2  Install the Configuration GUI Software
    3. 3.3  Connect the EVM and TSW14J57EVM
    4. 3.4  Connect the Power Supplies to the Boards (Power Off)
    5. 3.5  Connect the Signal Generators to the EVM (RF Outputs Disabled Until Directed)
    6. 3.6  Turn On the TSW14J57EVM Power and Connect to the PC
    7. 3.7  Turn On the ADC12DJ5200RFEVM/SEEVM Power Supplies and Connect to the PC
    8. 3.8  Turn On the Signal Generator RF Outputs
    9. 3.9  Open the ADC12DJ5200RFEVM/SEEVM GUI and Program the ADC and Clocks
    10. 3.10 Calibrate the ADC Device on the EVM
    11. 3.11 Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM
    12. 3.12 Capture Data Using the HSDC Pro Software
  5. 4Device Configuration
    1. 4.1 Supported JESD204C Device Features
    2. 4.2 Tab Organization
    3. 4.3 Low-Level Control
  6. 5Troubleshooting the ADC12DJ5200RFEVM/SEEVM
  7. 6References
    1. 6.1 Technical Reference Documents
    2. 6.2 TSW14J57EVM Operation
  8. 7HSDC Pro Settings for Optional ADC Device Configuration
    1. 7.1 Changing the Number of Frames per Multi-Frame (K)
    2. 7.2 Customizing the EVM for Optional Clocking Support
      1. 7.2.1 External Clocking Option (Default)
      2. 7.2.2 Onboard Clocking Option
      3. 7.2.3 External Reference Clocking Option
  9. 8Signal Routing
    1. 8.1 Signal Routing
  10.   A Analog Inputs
  11.   B Jumpers and LEDs
    1. 10.1 Jumper settings
  12.   B Revision History

Required Equipment

The following equipment and documents are included in the EVM evaluation kit:

  • Evaluation board (EVM)
  • Mini-USB cable
  • Power cable

The following equipment is not included in the EVM evaluation kit, but is required for evaluation of this product:

  • TSW14J57EVM data capture board and related items
  • High-Speed Data Converter Pro software.
  • PC computer running Microsoft®Windows® 7, or 10
  • Two low-noise signal generator one for DEVCLK (Sampling clock) second for providing reference signal. TI recommends the following generators:
    • Rohde & Schwarz® SMA100B
    • Rohde & Schwarz® SMA100A
  • One low-noise signal generator for analog input. TI recommends the following generators:
    • Rohde & Schwarz® SMA100B
    • Rohde & Schwarz® SMA100A
  • Bandpass filter for analog input signal (2897 MHz or desired frequency). The following filters are recommended:
    • Bandpass filter, greater than or equal to 60-dB harmonic attenuation, less than or equal to 5% bandwidth, greater than 18-dBm power, less than 5-dB insertion loss
    • Trilithic™ 5VH-series tunable BPF
    • K&L Microwave™ BT-series tunable BPF
    • TTE KC6 or KC7-series fixed BPF
  • Signal-path cables, SMA or BNC (or both SMA and BNC)

By default, the ADCxxDJxx00RFEVM/SEEVM has an external clocking solution. A few small board modifications enable onboard clocking. If onboard clocking is used, the following equipment is recommended.

  • One low-noise signal generators. TI recommends similar models to the analog input source.
  • A bandpass filter for the analog input. TI recommends a filter similar to the analog-input path filter.
    Note:

    The frequency of clock source used to drive the external reference clock (labeled REF CLK J17) displayed on the first page of the GUI under Reference Clock. The reference clock frequency is calculated by the GUI using JMODE and the sampling frequency (Fs) entered by the user. The reference clock generator and device clock generator must be frequency-locked using a common 10-MHz reference.