SLLA383A February   2018  – August 2022 SN65HVDA100-Q1 , SN65HVDA195-Q1 , TLIN1022-Q1 , TLIN1029-Q1 , TLIN2022-Q1 , TLIN2029-Q1 , TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 LIN Specification Progression
    2. 1.2 Workflow Concept
  4. 2Network Architecture
    1. 2.1 General Layout of the LIN Bus
    2. 2.2 Serial Communication Principles
    3. 2.3 Commander-Responder Principle
    4. 2.4 Message Frame Format
  5. 3Physical Layer Requirements
    1. 3.1 Bus Signaling Fundamentals
    2. 3.2 Pullup Values
    3. 3.3 Threshold Values
    4. 3.4 Bit-Rate Tolerance and Timing Requirements
    5. 3.5 Synchronization and Bit Sampling
    6. 3.6 Duty Cycle
  6. 4Filtering, Distance Limitations, Nodes on Bus
    1. 4.1 EMI and Signal Conditioning
    2. 4.2 ESD and Transients
    3. 4.3 Distance and Node Limitations
  7. 5LIN Transceiver Special Functions
    1. 5.1 Low-Power Modes
      1. 5.1.1 Sleep Mode
      2. 5.1.2 Standby Mode
    2. 5.2 Wakeup
      1. 5.2.1 Pin Wakeup
      2. 5.2.2 LIN Wakeup
      3. 5.2.3 Dominant Timeout
  8. 6Advantages and Disadvantages
  9. 7Conclusion
  10. 8Revision History

Distance and Node Limitations

The LIN specification defines the maximum number of nodes that can be connected to a LIN bus: 1 commander node and 16 responder nodes and the max cable harness length: 40m. Because of the definitions, there is no concern about having too many nodes on the bus nor the cable being too long, opposed to other communication interfaces. Capacitance on the bus still needs to be within a reasonable range for proper communication, and this can be affected by cable length, nodes, or bus filtering.

Since the cable length and node amount are limited by definition, the only parameter to keep in mind is any added capacitance; a good guideline is to stay under or close to 10-nF total bus capacitance at 20 kbps communication speed. Figure 4-1, Figure 4-2, and Figure 4-3 show the effect of having the nominal amount of capacitance, and what having too much capacitance looks like. In the case with too much capacitance, the rising edges are not able to reach the full voltage level in time for the next bit, and thus the bits are not interpreted correctly, as the RXD waveform illustrates.

GUID-54134997-FEB2-4561-A54E-6C0FA89189C0-low.gifFigure 4-1 LIN Bus With 220 pF, 20 kbps Message
GUID-DBA1C563-1107-41D6-9C33-395F20F1B15B-low.gifFigure 4-2 LIN Bus With 10 nF, 20 kbps Message
GUID-C3085D04-4920-4E22-988F-A18C3A142399-low.gifFigure 4-3 LIN Bus With 220 nF, 20 kbps Message