SLUUCI8 November   2023 BQ76905

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Battery Notational Conventions
    3.     Trademarks
    4.     Glossary
  3. 1 Introduction
  4. 2 Device Description
    1. 2.1 Overview
    2. 2.2 Functional Block Diagram
  5. 3 Device Configuration
    1. 3.1 Direct Commands and Subcommands
    2. 3.2 Configuration Using OTP or Registers
    3. 3.3 Data Formats
      1. 3.3.1 Unsigned Integer
      2. 3.3.2 Integer
      3. 3.3.3 Hex
  6. 4 Device Security
  7. 5 Measurement Subsystem
    1. 5.1 Voltage Measurement
      1. 5.1.1 Voltage Measurement Schedule
      2. 5.1.2 Unused VC Cell Input Pins
      3. 5.1.3 General Purpose ADCIN Functionality
    2. 5.2 Coulomb Counter and Digital Filters
    3. 5.3 Internal Temperature Measurement
    4. 5.4 Thermistor Temperature Measurement
    5. 5.5 Measurement Calibration
  8. 6 Protection Subsystem
    1. 6.1  Protections Overview
    2. 6.2  Protection FET Drivers
    3. 6.3  Cell Overvoltage Protection
    4. 6.4  Cell Undervoltage Protection
    5. 6.5  Short Circuit in Discharge Protection
    6. 6.6  Overcurrent in Charge Protection
    7. 6.7  Overcurrent in Discharge 1 and 2 Protections
    8. 6.8  Current Protection Latch
    9. 6.9  CHG Detector
    10. 6.10 Overtemperature in Charge Protection
    11. 6.11 Overtemperature in Discharge Protection
    12. 6.12 Internal Overtemperature Protection
    13. 6.13 Undertemperature in Charge Protection
    14. 6.14 Undertemperature in Discharge Protection
    15. 6.15 Host Watchdog Protection
    16. 6.16 Cell Open Wire Detection
    17. 6.17 Voltage Reference Measurement Diagnostic Protection
    18. 6.18 VSS Measurement Diagnostic Protection
    19. 6.19 REGOUT Diagnostic Protection
    20. 6.20 LFO Oscillator Integrity Diagnostic Protection
    21. 6.21 Internal Factory Trim Diagnostic Protection
  9. 7 Device Status and Controls
    1. 7.1 0x00 Control Status() and 0x12 Battery Status() Commands
    2. 7.2 LDOs
    3. 7.3 ALERT Pin Operation
    4. 7.4 TS Pin Operation
    5. 7.5 Programmable Timer
    6. 7.6 Device Event Timing
  10. 8 Operational Modes
    1. 8.1 Overview of Operational Modes
    2. 8.2 NORMAL Mode
    3. 8.3 SLEEP Mode
    4. 8.4 DEEPSLEEP Mode
    5. 8.5 SHUTDOWN Mode
    6. 8.6 CONFIG_UPDATE Mode
  11. 9 I2C Serial Communications
    1. 9.1 I2C Serial Communications Interface
  12. 10Cell Balancing
    1. 10.1 Cell Balancing
  13. 11Commands and Subcommands
    1. 11.1 Direct Commands
    2. 11.2 Bit field Definitions for Direct Commands
      1. 11.2.1  Safety Alert A Register
      2. 11.2.2  Safety Status A Register
      3. 11.2.3  Safety Alert B Register
      4. 11.2.4  Safety Status B Register
      5. 11.2.5  Battery Status Register
      6. 11.2.6  Alarm Status Register
      7. 11.2.7  Alarm Raw Status Register
      8. 11.2.8  Alarm Enable Register
      9. 11.2.9  FET CONTROL Register
      10. 11.2.10 REGOUT CONTROL Register
      11. 11.2.11 DSG FET Driver PWM Control Register
      12. 11.2.12 CHG FET Driver PWM Control Register
    3. 11.3 Command-only Subcommands
    4. 11.4 Subcommands with Data
    5. 11.5 Bit field Definitions for Subcommands
      1. 11.5.1 DEVICE NUMBER Register
      2. 11.5.2 FW VERSION Register
      3. 11.5.3 HW VERSION Register
      4. 11.5.4 SECURITY KEYS Register
      5. 11.5.5 CB ACTIVE CELLS Register
      6. 11.5.6 PROG TIMER Register
      7. 11.5.7 PROT RECOVERY Register
  14. 12Data Memory
    1. 12.1 Calibration
      1. 12.1.1 Calibration:Voltage
        1. 12.1.1.1 Calibration:Voltage:Cell 1 Gain
        2. 12.1.1.2 Calibration:Voltage:Cell 2 Gain Delta
        3. 12.1.1.3 Calibration:Voltage:Cell 3 Gain Delta
        4. 12.1.1.4 Calibration:Voltage:Cell 4 Gain Delta
        5. 12.1.1.5 Calibration:Voltage:Cell 5 Gain Delta
        6. 12.1.1.6 Calibration:Voltage:Stack Gain
      2. 12.1.2 Calibration:Current
        1. 12.1.2.1 Calibration:Current:Curr Gain
        2. 12.1.2.2 Calibration:Current:Curr Offset
        3. 12.1.2.3 Calibration:Current:CC1 Gain
        4. 12.1.2.4 Calibration:Current:CC1 Offset
      3. 12.1.3 Calibration:Temperature
        1. 12.1.3.1 Calibration:Temperature:TS Offset
        2. 12.1.3.2 Calibration:Temperature:Int Temp Gain
        3. 12.1.3.3 Calibration:Temperature:Int Temp Offset
    2. 12.2 Settings
      1. 12.2.1 Settings:Configuration
        1. 12.2.1.1 Settings:Configuration:Power Config
        2. 12.2.1.2 Settings:Configuration:REGOUT Config
        3. 12.2.1.3 Settings:Configuration:I2C Address
        4. 12.2.1.4 Settings:Configuration:I2C Config
        5. 12.2.1.5 Settings:Configuration:DA Config
        6. 12.2.1.6 Settings:Configuration:Vcell Mode
        7. 12.2.1.7 Settings:Configuration:Default Alarm Mask
        8. 12.2.1.8 Settings:Configuration:FET Options
        9. 12.2.1.9 Settings:Configuration:Charge Detector Time
      2. 12.2.2 Settings:Cell Balancing
        1. 12.2.2.1 Settings:Cell Balancing:Balancing Configuration
        2. 12.2.2.2 Settings:Cell Balancing:Min Temp Threshold
        3. 12.2.2.3 Settings:Cell Balancing:Max Temp Threshold
        4. 12.2.2.4 Settings:Cell Balancing:Max Internal Temp
      3. 12.2.3 Settings:Protection
        1. 12.2.3.1 Settings:Protection:Enabled Protections A
        2. 12.2.3.2 Settings:Protection:Enabled Protections B
        3. 12.2.3.3 Settings:Protection:DSG FET Protections A
        4. 12.2.3.4 Settings:Protection:CHG FET Protections A
        5. 12.2.3.5 Settings:Protection:Both FET Protections B
        6. 12.2.3.6 Settings:Protection:Body Diode Threshold
        7. 12.2.3.7 Settings:Protection:Cell Open Wire NORMAL Check Time
        8. 12.2.3.8 Settings:Protection:Cell Open Wire SLEEP Check Time
        9. 12.2.3.9 Settings:Protection:Host Watchdog Timeout
    3. 12.3 Protections
      1. 12.3.1 Protections:Cell Voltage
        1. 12.3.1.1 Protections:Cell Voltage:Cell Undervoltage Protection Threshold
        2. 12.3.1.2 Protections:Cell Voltage:Cell Undervoltage Protection Delay
        3. 12.3.1.3 Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis
        4. 12.3.1.4 Protections:Cell Voltage:Cell Overvoltage Protection Threshold
        5. 12.3.1.5 Protections:Cell Voltage:Cell Overvoltage Protection Delay
        6. 12.3.1.6 Protections:Cell Voltage:Cell Overvoltage Protection Recovery Hysteresis
      2. 12.3.2 Protections:Current
        1. 12.3.2.1  Protections:Current:Overcurrent in Charge Protection Threshold
        2. 12.3.2.2  Protections:Current:Overcurrent in Charge Protection Delay
        3. 12.3.2.3  Protections:Current:Overcurrent in Discharge 1 Protection Threshold
        4. 12.3.2.4  Protections:Current:Overcurrent in Discharge 1 Protection Delay
        5. 12.3.2.5  Protections:Current:Overcurrent in Discharge 2 Protection Threshold
        6. 12.3.2.6  Protections:Current:Overcurrent in Discharge 2 Protection Delay
        7. 12.3.2.7  Protections:Current:Short Circuit in Discharge Protection Threshold
        8. 12.3.2.8  Protections:Current:Short Circuit in Discharge Protection Delay
        9. 12.3.2.9  Protections:Current:Latch Limit
        10. 12.3.2.10 Protections:Current:Recovery Time
      3. 12.3.3 Protections:Temperature
        1. 12.3.3.1  Protections:Temperature:Overtemperature in Charge Protection Threshold
        2. 12.3.3.2  Protections:Temperature:Overtemperature in Charge Protection Delay
        3. 12.3.3.3  Protections:Temperature:Overtemperature in Charge Protection Recovery
        4. 12.3.3.4  Protections:Temperature:Undertemperature in Charge Protection Threshold
        5. 12.3.3.5  Protections:Temperature:Undertemperature in Charge Protection Delay
        6. 12.3.3.6  Protections:Temperature:Undertemperature in Charge Protection Recovery
        7. 12.3.3.7  Protections:Temperature:Overtemperature in Discharge Protection Threshold
        8. 12.3.3.8  Protections:Temperature:Overtemperature in Discharge Protection Delay
        9. 12.3.3.9  Protections:Temperature:Overtemperature in Discharge Protection Recovery
        10. 12.3.3.10 Protections:Temperature:Undertemperature in Discharge Protection Threshold
        11. 12.3.3.11 Protections:Temperature:Undertemperature in Discharge Protection Delay
        12. 12.3.3.12 Protections:Temperature:Undertemperature in Discharge Protection Recovery
        13. 12.3.3.13 Protections:Temperature:Internal Overtemperature Protection Threshold
        14. 12.3.3.14 Protections:Temperature:Internal Overtemperature Protection Delay
        15. 12.3.3.15 Protections:Temperature:Internal Overtemperature Protection Recovery
    4. 12.4 Power
      1. 12.4.1 Power:Sleep
        1. 12.4.1.1 Power:Sleep:Sleep Current
        2. 12.4.1.2 Power:Sleep:Voltage Time
        3. 12.4.1.3 Power:Sleep:Wake Comparator Current
      2. 12.4.2 Power:Shutdown
        1. 12.4.2.1 Power:Shutdown:Shutdown Cell Voltage
        2. 12.4.2.2 Power:Shutdown:Shutdown Stack Voltage
        3. 12.4.2.3 Power:Shutdown:Shutdown Temperature
        4. 12.4.2.4 Power:Shutdown:Auto Shutdown Time
    5. 12.5 Security
      1. 12.5.1 Security:Settings
        1. 12.5.1.1 Security:Settings:Security Settings
        2. 12.5.1.2 Security:Settings:Full Access Key Step 1
        3. 12.5.1.3 Security:Settings:Full Access Key Step 2
    6. 12.6 Data Memory Summary
  15. 13Revision History

6.1 Protections Overview

The BQ76905 integrates an extensive protection subsystem which can monitor a variety of parameters, initiate protective actions, and autonomously recover based on conditions. The device also includes a wide range of flexibility, such that the device can be configured to monitor and initiate protective action, but with recovery controlled by the host processor, or such that the device only monitors and alerts the host processor whenever conditions warrant protective action, but with action and recovery fully controlled by the host processor. The protection subsystem includes a suite of individual protections that can be individually enabled and configured, as shown in Table 6-1. The current protections are based on comparator thresholds, while most voltage and temperature protections are based on ADC measurements. Some protection checks are primarily for diagnostic purposes, so the device can be autonomously disabled if a malfunction is detected. The device integrates NFET drivers for low-side CHG and DSG protection FETs, which can be configured in a series or parallel configuration. The FET drivers also support PWM modes of operation, which can be used to implement a precharge or predischarge functionality.

Table 6-1 BQ76905 Protections
Protection Implementation Description
Cell Undervoltage ADC measurement Detects individual cell voltage below programmed threshold
Cell Overvoltage ADC measurement Detects individual cell voltage above programmed threshold
Overcurrent in Charge Analog comparator Detects charging current above programmed threshold
Overcurrent in Discharge 1 / 2 Analog comparator Two levels of detection for discharging current beyond programmed thresholds
Short Circuit in Discharge Analog comparator Detects discharging current above programmed threshold
Undertemperature in Charge ADC measurement Detects thermistor temperature below programmed threshold limit for charging operation
Overtemperature in Charge ADC measurement Detects thermistor temperature above programmed threshold limit for charging operation
Undertemperature in Discharge ADC measurement Detects thermistor temperature below programmed threshold limit for discharging operation
Overtemperature in Discharge ADC measurement Detects thermistor temperature above programmed threshold limit for discharging operation
Internal Overtemperature ADC measurement Detects internal device temperature above programmed threshold
REGOUT LDO Check Analog comparator Diagnostic check - detects voltage or temperature fault on REGOUT regulator when enabled
Voltage Reference Check ADC measurement Diagnostic check which digitizes the internal 1.8V LDO using the ADC and VREF1, and detects any excessive deviation from the expected result
VSS Check ADC measurement Diagnostic check on ADC mux - device digitizes VSS and detects any excessive deviation from the expected result
Host Watchdog Digital logic Detects absence of host processor communications

The individual protections are enabled by setting the related Settings:Protection:Enabled Protections A – B data memory configuration registers. Most protections include a programmable threshold, and when the monitored parameter first exceeds the programmed threshold, a protection alert is asserted. After the parameter remains beyond the threshold for a programmable delay period, a protection status fault is asserted (and the alert is deasserted). The protection alerts are provided by the 0x02 Safety Alert A() and 0x04 Safety Alert B() commands, while the protection status faults are provided by the 0x03 Safety Status A() and 0x05 Safety Status B() commands, as shown below. Most protections also include a programmable recovery criteria, such that if the parameter no longer exceeds the threshold by some margin, the protection status fault is deasserted. Protection alert and status faults can be mapped to provide an interrupt to the host processor on the ALERT pin, using the 0x62 Alarm Status(), 0x64 Alarm Raw Status(), and 0x66 Alarm Enable() commands.

Table 6-2 Format for 0x02 Safety Alert A()
Bit Name Description
7 COV Cell Overvoltage Safety Alert
6 CUV Cell Undervoltage Safety Alert
5 SCD Short Circuit in Discharge Safety Alert
4 OCD1 Overcurrent in Discharge 1 Safety Alert
3 OCD2 Overcurrent in Discharge 2 Safety Alert
2 OCC Overcurrent in Charge Safety Alert
1-0 RSVD0 Reserved
Table 6-3 Format for 0x03 Safety Status A()
Bit Name Description
7 COV Cell Overvoltage Safety Fault
6 CUV Cell Undervoltage Safety Fault
5 SCD Short Circuit in Discharge Safety Fault
4 OCD1 Overcurrent in Discharge 1 Safety Fault
3 OCD2 Overcurrent in Discharge 2 Safety Fault
2 OCC Overcurrent in Charge Safety Fault
1 CURLATCH Current Protection Latch Safety Fault
0 REGOUT REGOUT Safety Fault
Table 6-4 Format for 0x04 Safety Alert B()
Bit Name Description
7 OTD Overtemperature in Discharge Safety Alert
6 OTC Overtemperature in Charge Safety Alert
5 UTD Undertemperature in Discharge Safety Alert
4 UTC Undertemperature in Charge Safety Alert
3 OTINT Internal Overtemperature Safety Alert
2 HWD Host Watchdog Safety Alert
1 VREF VREF Measurement Diagnostic Alert
0 VSS VSS Measurement Diagnostic Alert
Table 6-5 Format for 0x05 Safety Status B()
Bit Name Description
7 OTD Overtemperature in Discharge Safety Fault
6 OTC Overtemperature in Charge Safety Fault
5 UTD Undertemperature in Discharge Safety Fault
4 UTC Undertemperature in Charge Safety Fault
3 OTINT Internal Overtemperature Safety Fault
2 HWD Host Watchdog Safety Fault
1 VREF VREF Measurement Diagnostic Fault
0 VSS VSS Measurement Diagnostic Fault

The thresholds, delays, and recovery criteria are controlled by individual data memory settings in the Protections class. For example, the Cell Undervoltage Protection is configured using the Protections:Cell Voltage:Cell Undervoltage Protection Threshold, Protections:Cell Voltage:Cell Undervoltage Protection Delay, and Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis data memory settings.

The control of the protection FETs in response to a detected protection event is also configurable, with the device able to operate in a fully autonomous mode, a completely manual mode (controlled through host commands over the serial communications bus), or a combination of the two. Autonomous mode is enabled by setting the Settings:Configuration:FET Options[FET_EN] data memory configuration bit or sending the 0x0022 FET Enable() subcommand, which toggles the [FET_EN] bit. The device can operate in a combined autonomous/manual mode, such that the device can operate autonomously when the host processor does not intervene, but still allows the host to override the autonomous decisions and force FETs on or off based on serial communications. This can be attractive in cases where the host needs autonomous reaction to selected faults, such as a short circuit in discharge event, to provide the fastest protection response, but prefer manual control for other faults, such as cell overtemperature or overvoltage faults. The 0x29 FET Control() command provides manual FET control capability by the host. If the user is concerned about unauthorized or inadvertent manual FET control by a host, these selected commands can be disabled using the Settings:Configuration:FET Options[HOST_FETOFF_EN] and [HOST_FETON_EN] data memory configuration settings. Each protection can be configured whether it autonomously disables the pertinent protection FET using the Settings:Protection:CHG FET Protections A, Settings:Protection:DSG FET Protections A, and Settings:Protection:Both FET Protections C settings.