SLVAFJ8 may   2023 TPS7H5001-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2System Design Theory
    1. 2.1  Switching Frequency
    2. 2.2  Leading Edge Blanking
    3. 2.3  Dead Time
    4. 2.4  Enable and UVLO
    5. 2.5  Output Voltage Programing
    6. 2.6  Soft Start
    7. 2.7  Sensing Circuit
    8. 2.8  FAULT Mode
    9. 2.9  HICCUP Mode
    10. 2.10 Slope Compensation
    11. 2.11 Output Capacitance
    12. 2.12 Compensation
  6. 3Test Results
  7. 4Bill of Materials
  8. 5Schematics
  9. 6PCB Layouts
  10. 7References

Schematics

Figure 5-1 through Figure 5-6 show the EVM schematics.

GUID-20230215-SS0I-8BCM-KFSP-DW2CTSSH2BHF-low.svg Figure 5-1 Controller Card Schematic
GUID-20230215-SS0I-BNFN-WMTR-DQLJXGVPL4TW-low.svg Figure 5-2 Daughter Card Schematic (Page 1)
GUID-20230428-SS0I-8FXS-ZKZ7-K657CXZ5BHCR-low.svg Figure 5-3 Daughter Card Schematic (Page 2)
GUID-20230215-SS0I-GTNH-LTJZ-JKFX6WJP8FMM-low.svg Figure 5-4 Mother Board Schematic (Page 1)
GUID-20230215-SS0I-SZCK-TNBM-6PRKKZXSC9RF-low.svg Figure 5-5 Mother Board Schematic (Page 2)
GUID-20230215-SS0I-SZ04-H08G-MSNNWWMXTMLL-low.svg Figure 5-6 Mother Board Schematic (Page 3)