SLVUB56A July   2017  – September 2021 TPS54424

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Adjustable UVLO
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Efficiency
    3. 2.3  Output Voltage Regulation
    4. 2.4  Load Transient and Loop Response
    5. 2.5  Output Voltage Ripple
    6. 2.6  Input Voltage Ripple
    7. 2.7  Powering Up
    8. 2.8  Powering Down
    9. 2.9  Start-Up Into Pre-Bias
    10. 2.10 Hiccup Mode Current Limit
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

Input/Output Connections

The TPS54424EVM-779 is provided with input/output connectors and test points as shown in Table 2-1. To support the full current capability of an unmodified TPS54424EVM-779, a power supply capable of supplying greater than 2 A must be connected to J1 through a pair of 20-AWG wires or better. The load must be connected to J2 through a pair of 20-AWG wires or better. The maximum load current capability before hitting current limit is typically 6 A to 7 A. Wire lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input voltages with TP7 providing a convenient ground reference. TP4 is used to monitor the output voltage with TP9 as the ground reference.

Table 2-1 TPS54424EVM-779 EVM Connectors and Test Points
Reference DesignatorFunction
J1VIN input voltage connector (see Table 1-1 for VIN range)
J2VOUT terminal to connect load
J32-pin header for enable. Add shunt to connect EN to ground and disable device.
J42-pin header for power good resistor pullup connection. Add a shunt to pull up to VOUT only if VOUT < 6.0 V. If VOUT > 6.0 V keep open and use external supply with TP5 to pullup PGOOD.
TP1VIN test point
TP2EN test point
TP3SW node test point
TP41.8-V test point
TP5PGOOD pullup test point
TP6PGOOD test point
TP7PGND test point
TP8SS/TRK test point
TP9PGND test point
TP10Test point between voltage divider network and output of TPS54424 converter. Used for loop response measurements.
TP11PGND test point
TP12AGND test point
TP13AGND test point
TP14PGND test point
TP15Test point for supplying external CLK for synchronization. C20 and R10 should be populated to use.