SNLA417 January   2023 DP83TC812R-Q1 , DP83TC812S-Q1

 

  1.   Abstract
  2. 1Introduction
    1. 1.1 Acronyms
  3. 2TC10 Test Setup
    1. 2.1 Overview
    2. 2.2 Wakeup to Linking Sequence
  4. 3Measurement Summary
    1. 3.1 Complete Timing Diagram
    2. 3.2 Measurement Summary
    3. 3.3 LP1 Wake to Linking Time
  5. 4Timing Measurements
    1. 4.1 LP1 WAKE to INH (T1)
    2. 4.2 LP1 INH to WUP (T2)
    3. 4.3 WUP to PHY INH (T3)
    4. 4.4 PHY INH/Buck EN to Buck nRESET (T4)
    5. 4.5 Buck nRESET/PMIC Enable to MCU nReset (T5)
    6. 4.6 MCU nReset to MDIO Communication (T6 and T7)
    7. 4.7 MDIO Master Configuration + Linking (T8 and T9)
  6. 5Measurement Evaluation
    1. 5.1 Recommendations for Optimizing Variable TC10 Times
      1. 5.1.1 Improving MCU Boot-up Time (T6)
      2. 5.1.2 Improving MDIO State Machine (T7)
      3. 5.1.3 Optimizing MDIO Timeline (T8)
        1. 5.1.3.1 Optimizing Master Configuration by Removing Polling
        2. 5.1.3.2 Optimizing Master Configuration by Improving MDC
      4. 5.1.4 PHY Configuration During Sleep
      5. 5.1.5 Other Configurable Values
    2. 5.2 Alternative TC10 Test
  7. 6Conclusion
  8. 7References

4.7 MDIO Master Configuration + Linking (T8 and T9)

Configuring the PHY as the master involves writing to a series of registers as a minimum requirement to be compliant with Open Alliance Specifications. For more information about these specifications, see the DP83TC812, DP83TC813, and DP83TC814: Configuring for Open Alliance Specification Compliance application note.

Table 4-1 is a timeline for the data written along the MDIO line. Overall, decoding the data transmitted shows that interval T8 – the time it takes to configure the PHY as master – is 3.914ms for this system.

After the PHY is successfully configured as master, both master and slave PHYs begin a handshake process to establish a link. The echo canceler, scrambler, equalizer, and timing of the PHY undergo training to provide proper communication. Interval T9 is measured to be 14.541ms.

Table 4-1 MDIO Timeline for Master Configuration + Linking
Time (ms)RegisterData (Write)Action
0tms_cfg_start: MDIO Master Configuration Starts
0.0100x001F0x8000Hard Reset
0.2250x05230x0001Disable Linkup
0.3960x08340xC001Configure PHY as Master
0.396–2.370Configurations to enable shorter link-up time
2.3700x001F0x4000Soft Reset
2.5840x05230x0000Enable Linkup
3.9140x001F0x4000tms_cfg_end: Soft Reset
18.455tlink: LED0 lights up. PHYs are linked.