SNLA438 September   2023 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83826E , DP83826I , DP83867CS , DP83867E , DP83867IS , DP83869HM

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2PROFINET Specification Requirements
  6. 3Ethernet PHY Setup
    1. 3.1 DP83822
      1. 3.1.1 DP83822 Hardware Bootstrap Configurations
      2. 3.1.2 DP83822 Register Configuration
    2. 3.2 DP83826
      1. 3.2.1 DP83826 Hardware Bootstrap Configuration
      2. 3.2.2 DP83826 Register Configuration
    3. 3.3 DP83867
      1. 3.3.1 DP83867 Hardware Bootstrap Configurations
      2. 3.3.2 DP83867 Register Configuration
    4. 3.4 DP83869
      1. 3.4.1 DP83869 Hardware Bootstrap Configurations
      2. 3.4.2 DP83869 Register Configuration
  7. 4Summary
  8. 5References

3.1.2 DP83822 Register Configuration

If hardware bootstraps are not sufficient, our Ethernet PHYs can be configured through Register Writes, which can change the PHYs mode, regardless of how the Bootstraps are configured.

Table 3-3 DP83822 Software Configuration
Register Address Write Value Remarks
0000 3100

Auto-Negotiation and Full Duplex Enabled.

For 100Mbps Forced Mode write '2100'
0004 0101 De-advertise 10BaseTe and Half Duplex modes of operation
000A See Remark

For Copper, write '0080'

For Fiber write '4080'
000B 100F

FLD Enabled

Last nibble 'F' sets Fast Link Drop Functionality

Details can be found in Data Sheet, search for '0x000B'
001F 4000 Soft Reset PHY