SNLU334 December   2023 DS320PR410

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1  DS320PR410 5-Level I/O Control Inputs
    2. 2.2  DS320PR410 Modes of Operation
    3. 2.3  DS320PR410 SMBus or I2C Register Control Interface
    4. 2.4  DS320PR410 Equalization Control
    5. 2.5  DS320PR410 RX Detect State Machine
    6. 2.6  DS320PR410 DC Gain Control
    7. 2.7  DS320PR410 EVM Global Controls
    8. 2.8  DS320PR410-RSC-EVM Downstream Devices Control
    9. 2.9  DS320PR410-RSC-EVM Upstream Devices Control
    10. 2.10 Quick-Start Guide (Pin Mode)
    11. 2.11 Quick-Start Guide (SMBus / I2C Secondary Mode)
  9. 3Implementation Results
    1. 3.1 Test Setup and Results
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1.     Trademarks
  12. 6References

2.5 DS320PR410 RX Detect State Machine

Each DS320PR410 deploys an RX Detect state machine that governs the RX detection cycle as defined in the PCI Express specification. At power up or after a manually triggered event, the redriver determines whether or not a valid PCI Express termination is present at the far end of the link. When the DS320PR410 is in Pin Mode (MODE = L0), the RX_DET pin of DS320PR410 provides additional flexibility to system designers to appropriately set the device in their desired mode, according to Table 3-5.

Table 2-5 Receiver Detect State Machine Settings
PD PIN LEVEL RX_DET PIN LEVEL DS320PR410 Channel RX Common-mode Impedance DESCRIPTION
L L0 Always 50 Ω PCI Express RX detection state machine is disabled. Recommended for non-PCI Express use cases.
L L1 Pre Detect: Hi-Z
Post Detect: 50 Ω		 Outputs poll until 3 consecutive valid detections.
L L2 Pre Detect: Hi-Z
Post Detect: 50 Ω		 Outputs poll until 2 consecutive valid detections.
L L3 N/A Reserved
L L4 (Float) Pre Detect: Hi-Z
Post Detect: 50 Ω		 TX polls approx. every 150 μs until valid termination is detected. Rx CM impedance held at Hi-Z until detection. Reset by asserting PD high for 200 μs then low.
H X Hi-Z Reset all DS320PR410 channels signal path and set their Rx impedance state to Hi-Z.

The RX Detect state of each channel of each device can also be set by writing to SMBus / I2C registers in Secondary or Primary Modes. Refer to the DS320PR410 Programming Guide for details.