SNVU865 june   2023 LP87702-Q1

 

  1.   1
  2.   LP877020-Q1 Technical Reference Manual
  3.   Trademarks
  4. 1Introduction
  5. 2Register Bits Loaded From OTP Memory
  6. 3Revision History

2 Register Bits Loaded From OTP Memory

LP8770-Q1 device includes OTP memory. Table 2-1 lists the register bits that are loaded from the memory during device startup.

Table 2-1 Summary of Registers Bits
AddressRegister NameBitLP877021
0x00DEV_REVDEVICE_ID[2:0]0x0
0x01OTP_CODEOTP_ID[5:0]0x38
0x01OTP_CODEOTP_REV[1:0]1
BUCK CONTROL
0x02BUCK0_CTRL_1BUCK0_FPWM_MPAuto
0x02BUCK0_CTRL_1BUCK0_FPWMPWM
0x02BUCK0_CTRL_1BUCK0_EN_PIN_CTRL[1:0]BUCK0_EN bit AND EN1 pin
0x02BUCK0_CTRL_1BUCK0_ENEnabled
0x03BUCK0_CTRL_2BUCK0_ILIM[2:0]4.0 A
0x03BUCK0_CTRL_2BUCK0_SLEW_RATE[2:0]1.9 mV/µs
0x04BUCK1_CTRL_1BUCK1_FPWMPWM
0x04BUCK1_CTRL_1BUCK1_EN_PIN_CTRL[1:0]BUCK1_EN bit AND EN1 pin
0x04BUCK1_CTRL_1BUCK1_ENEnabled
0x05BUCK1_CTRL_2BUCK1_ILIM[2:0]4.5 A
0x05BUCK1_CTRL_2BUCK1_SLEW_RATE[2:0]1.9 mV/µs
0x06BUCK0_VOUTBUCK0_VSET[7:0]1800 mV
0x07BUCK1_VOUTBUCK1_VSET[7:0]1100 mV
BOOST CONTROL
0x08BOOST_CTRLBOOST_VSET[1:0]5.0 V
0x08BOOST_CTRLBOOST_FPWMPWM
0x08BOOST_CTRLBOOST_EN_PIN_CTRL[1:0]BOOST_EN bit
0x08BOOST_CTRLBOOST_ENEnabled
STARTUP AND SHUTDOWN DELAYS
0x09BUCK0_DELAYBUCK0_SHUTDOWN_DELAY[3:0]15 ms
0x09BUCK0_DELAYBUCK0_STARTUP_DELAY[3:0]5 ms
0x0ABUCK1_DELAYBUCK1_SHUTDOWN_DELAY[3:0]5 ms
0x0ABUCK1_DELAYBUCK1_STARTUP_DELAY[3:0]15 ms
0x0BBOOST_DELAYBOOST_SHUTDOWN_DELAY[3:0]0.0 ms
0x0BBOOST_DELAYBOOST_STARTUP_DELAY[3:0]0.0 ms
0x0CGPO0_DELAYGPO0_SHUTDOWN_DELAY[3:0]10 ms
0x0CGPO0_DELAYGPO0_STARTUP_DELAY[3:0]10 ms
0x0DGPO1_DELAYGPO1_SHUTDOWN_DELAY[3:0]0.0 ms
0x0DGPO1_DELAYGPO1_STARTUP_DELAY[3:0]0.0 ms
0x0EGPO2_DELAYGPO2_SHUTDOWN_DELAY[3:0]0.0 ms
0x0EGPO2_DELAYGPO2_STARTUP_DELAY[3:0]0.0 ms
GPO
0x0FGPO_CONTROL_1GPO1_PG1_ODOD
0x0FGPO_CONTROL_1GPO1_EN_PIN_CTRL[1:0]GPO1_OUT bit
0x0FGPO_CONTROL_1GPO1_OUTLow
0x0FGPO_CONTROL_1GPO0_ODPP
0x0FGPO_CONTROL_1GPO0_EN_PIN_CTRL[1:0]GPO0_OUT bit AND EN1 pin
0x0FGPO_CONTROL_1GPO0_OUTHigh
0x10GPO_CONTROL_2GPO2_SELCLKIN
0x10GPO_CONTROL_2GPO1_SELPG1
0x10GPO_CONTROL_2GPO2_ODOD
0x10GPO_CONTROL_2GPO2_EN_PIN_CTRL[1:0]GPO2_OUT bit
0x10GPO_CONTROL_2GPO2_OUTLow
0x11CONFIGSTARTUP_DELAY_SEL0 - 15 ms with 1 ms steps
0x11CONFIGSHUTDOWN_DELAY_SEL0 - 15 ms with 1 ms steps
0x11CONFIGCLKIN_PDDisabled
0x11CONFIGEN3_PDDisabled
0x11CONFIGEN2_PDDisabled
0x11CONFIGEN1_PDEnabled
0x11CONFIGTDIE_WARN_LEVEL140 °C
0x11CONFIGEN_SPREAD_SPECEnabled
EXTERNAL SYNC CLOCK
0x12PLL_CTRLEN_PLLEnabled
0x12PLL_CTRLEXT_CLK_FREQ[4:0]1 MHz
POWERGOOD AND MONITORINGS
0x13PGOOD_CTRLPGOOD_WINDOWWindow
0x13PGOOD_CTRLEN_PGOOD_VANAEnabled
0x13PGOOD_CTRLEN_PGOOD_VMON2Enabled
0x13PGOOD_CTRLEN_PGOOD_VMON1Enabled
0x13PGOOD_CTRLEN_PGOOD_BOOSTDisabled
0x13PGOOD_CTRLEN_PGOOD_BUCK1Enabled
0x13PGOOD_CTRLEN_PGOOD_BUCK0Enabled
0x14PGOOD_LEVEL_1VMON1_WINDOW[1:0]±4 %
0x14PGOOD_LEVEL_1VMON1_THRESHOLD[2:0]0.65 V
0x15PGOOD_LEVEL_2VMON2_WINDOW[1:0]±4 %
0x15PGOOD_LEVEL_2VMON2_THRESHOLD[2:0]1.8 V
0x15PGOOD_LEVEL_2VANA_WINDOW[1:0]±4 %
0x15PGOOD_LEVEL_2VANA_THRESHOLD3.3 V
0x16PGOOD_LEVEL_3BOOST_WINDOW[1:0]±4 %
0x16PGOOD_LEVEL_3BUCK1_WINDOW[1:0]±50 mV
0x16PGOOD_LEVEL_3BUCK0_WINDOW[1:0]±70 mV
0x17PG_CTRLPG1_MODEInvalid
0x17PG_CTRLPGOOD_FAULT_GATES_PG1Status
0x17PG_CTRLPG1_POLHigh
0x17PG_CTRLPG0_MODEInvalid
0x17PG_CTRLPGOOD_FAULT_GATES_PG0Status
0x17PG_CTRLPG0_ODOD
0x17PG_CTRLPG0_POLHigh
0x18PG0_CTRLPG0_RISE_DELAY11 ms
0x18PG0_CTRLSEL_PG0_TWARNNo
0x18PG0_CTRLSEL_PG0_VANAYes
0x18PG0_CTRLSEL_PG0_VMON2No
0x18PG0_CTRLSEL_PG0_VMON1No
0x18PG0_CTRLSEL_PG0_BOOSTNo
0x18PG0_CTRLSEL_PG0_BUCK1No
0x18PG0_CTRLSEL_PG0_BUCK0No
0x1APG1_CTRLPG1_RISE_DELAY11 ms
0x1APG1_CTRLSEL_PG1_TWARNNo
0x1APG1_CTRLSEL_PG1_VANAYes
0x1APG1_CTRLSEL_PG1_VMON2Yes
0x1APG1_CTRLSEL_PG1_VMON1Yes
0x1APG1_CTRLSEL_PG1_BOOSTNo
0x1APG1_CTRLSEL_PG1_BUCK1Yes
0x1APG1_CTRLSEL_PG1_BUCK0Yes
WATCHDOG
0x1CWD_CTRL_1WD_CLOSE_TIME[1:0]50 ms
0x1CWD_CTRL_1WD_OPEN_TIME[1:0]200 ms
0x1CWD_CTRL_1WD_LONG_OPEN_TIME[1:0]2000 ms
0x1CWD_CTRL_1WD_RESET_CNTR_SEL[1:0]Disabled
0x1DWD_CTRL_2WD_SYS_RESTART_FLAG_MODEStatus
0x1DWD_CTRL_2WD_EN_OTP_READEnabled
0x1DWD_CTRL_2WDI_PDEnabled
0x1DWD_CTRL_2WDR_POLActive low
0x1DWD_CTRL_2WDR_ODOD
0x35WD_DIS_CONTROLWD_DIS_CTRLWD_DIS PIN CTRL Enabled
INTERRUPT MASKS
0x29TOP_MASK_1I_MEAS_MASKMasked
0x29TOP_MASK_1SYNC_CLK_MASKMasked
0x29TOP_MASK_1TDIE_WARN_MASKUnmasked
0x2ATOP_MASK_2RESET_REG_MASKMasked
0x2BBUCK_MASKBUCK1_PGF_MASKMasked
0x2BBUCK_MASKBUCK1_PGR_MASKMasked
0x2BBUCK_MASKBUCK1_ILIM_MASKMasked
0x2BBUCK_MASKBUCK0_PGF_MASKMasked
0x2BBUCK_MASKBUCK0_PGR_MASKMasked
0x2BBUCK_MASKBUCK0_ILIM_MASKMasked
0x2CBOOST_MASKBOOST_PGF_MASKMasked
0x2CBOOST_MASKBOOST_PGR_MASKMasked
0x2CBOOST_MASKBOOST_ILIM_MASKMasked
0x2DDIAG_MASKVMON2_PGF_MASKMasked
0x2DDIAG_MASKVMON2_PGR_MASKMasked
0x2DDIAG_MASKVMON1_PGF_MASKMasked
0x2DDIAG_MASKVMON1_PGR_MASKMasked
0x2DDIAG_MASKVANA_PGF_MASKMasked
0x2DDIAG_MASKVANA_PGR_MASKMasked
BUCK AND BOOST SWITCHING FREQUENCY
0x31FREQ_SELBOOST_FREQ_SEL4 MHz
0x31FREQ_SELBUCK_FREQ_SEL[1:0]4 MHz
BOOST CURRENT LIMIT
0x32BOOST_ILIM_CTRLBOOST_ILIM1.4 A