SPRACI7A October 2018 – March 2022 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28P550SJ , TMS320F28P559SJ-Q1
Term | Definition |
---|---|
ATE | Automated Test Equipment |
CPU | Central Processing Unit |
DC | Diagnostic Coverage |
DCSM | Dual Zone Code Security Module |
FTTI | Fault Tolerant Time Interval |
MDP | Memory Data Path (Path interfacing the PBIST controller and the memory) |
MPOST | Memory Power on Self-Test |
NMI | Non-Maskable Interrupt |
OTP | One-Time Programmable |
PBIST | Programmable Built In Self-Test (Programmable engine required for self-test) |
ROM | Read-Only Memory |
SRAM | Static Random Access Memory |