SPRAD51A December   2023  – April 2024 TMS320F2800157 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F28P659DK-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Programming Fundamentals
  6. 3ROM Bootloader and Hex Utility Usage
  7. 4DCAN Flash Kernel
    1. 4.1 Implementation
      1. 4.1.1 Custom Flash Bank and Sector Erase
      2. 4.1.2 Application Load
  8. 5MCAN Flash Kernel
    1. 5.1 Implementation
      1. 5.1.1 Custom Flash Bank and Sector Erase
      2. 5.1.2 Application Load
  9. 6Example Implementation
    1. 6.1 Device Setup
      1. 6.1.1 Flash Kernels
      2. 6.1.2 Hardware
    2. 6.2 Host Application: dcan_flash_programmer
      1. 6.2.1 Overview
      2. 6.2.2 Building and Running dcan_flash_programmer Using Visual Studio
      3. 6.2.3 Running dcan_flash_programmer for F28003x
      4. 6.2.4 Using the Project With DCAN Bootloader
      5. 6.2.5 Using the Project With CCS
    3. 6.3 Host Application: can_flash_programmer [MCAN]
      1. 6.3.1 Overview
      2. 6.3.2 Building and Running can_flash_programmer Using Visual Studio
      3. 6.3.3 Running can_flash_programmer for F28003x
      4. 6.3.4 Using the Project With MCAN Bootloader
      5. 6.3.5 Using the Project With CCS
    4. 6.4 Application Load: CPU2 Image
      1. 6.4.1 Combining Two Images (.txt)
  10. 7Troubleshooting
    1. 7.1 General
    2. 7.2 DCAN Boot
    3. 7.3 MCAN Boot
  11. 8References
  12. 9Revision History

Implementation

The flash kernel project is modeled after the MCAN ROM bootloader. It goes straight into the MCAN_Boot function which has been modified to write to Flash. The MCAN module initialization for the flash kernel is the same as the bootloader – the clock source for the MCAN module, the nominal and data bit rates, GPIO pins, and so forth, are set by the kernel on initialization according to the boot mode. Before any application data is received, the F28P55x and F28P65x (not the F28P65x, this is done later) MCAN flash kernel erases the flash of the device, readying it for programming. Additionally, the F28P55x MCAN flash kernel project allows the user to specify which flash banks and flash sectors should be erased before the application is programmed. This is discussed in more detail in Custom Flash Bank and Sector Erase. After the appropriate locations in flash memory are erased, the application load begins.

The flash kernel receives 64 bytes at a time from the host and places the contents into an intermediate RAM buffer. This buffer is then written into Flash in 128-bit or 512-bit increments. The F28003x and F28P65x flash kernels write 128 bits at a time, while the F28P55x flash kernel writes 512 bits at a time. Before writing to a sector for the first time, the F28003x checks to see if the sector has been erased, and if it has not been erased, the Flash kernel has the Flash API execute an erase operation (The F28P55x and F28P65x flash kernels erase flash beforehand, as described above). After this, a buffer is filled up with content to be written into Flash, and a program command is sent from the Flash API. Once the write has occurred, the Flash kernel has the Flash API verify that the segment was written into Flash at the correct address. Once the kernel has copied everything to Flash, the project jumps to the entry address of the image.

All of the sections of the firmware image stored in flash should be aligned according to the number of bits being programmed at once. If programming 128-bits at once (F28003x and F28P65x), the sections should be aligned to a 128-bit boundary. In the linker command file for the firmware image, all initialized sections need to be mapped to Flash sectors, and after each mapping, an ALIGN(8) directive needs to be added to ensure the 128-bit alignment. If programming 512-bits at once (F28P55x), the sections should be aligned to a 512-bit boundary. In the linker command file for the firmware image, all initialized sections need to be mapped to Flash sectors, and after each mapping, an ALIGN(32) directive needs to be added to ensure the 512-bit alignment.

The protocol used to transfer the application data follows the MCAN ROM loader protocol. With the original MCAN ROM loader protocol, nominal bitrate used is 1Mbps and transmits 64 bytes per frame from the host to the target device for nominal bit timing. The data bitrate used by the protocol is 2Mbps for data bit timing.