SPRAD85
March 2023
AM62A3
,
AM62A3-Q1
,
AM62A7
,
AM62A7-Q1
Abstract
Trademarks
1
Introduction
1.1
Before Getting Started
1.2
Device (Processor) Selection
1.3
Technical Documentation
1.4
Design Documentation
2
System Block Diagram
2.1
Creating the System Block Diagram
2.2
Selecting the Boot Mode
2.3
Confirming Pin Multiplexing Compatibility
3
Power Supply
3.1
Power Supply Architecture
3.1.1
Integrated Power Architecture
3.1.2
Discrete Power Architecture
3.2
Power (Supply) Rails
3.2.1
Core Supply
3.2.2
Peripheral Power Supply
3.2.3
Internal LDOs for I/O groups
3.2.4
Dual-Voltage LVCMOS I/Os
3.2.5
Dual-Voltage Dynamic Switching I/Os for SDIO
3.2.6
VPP (eFuse ROM programming supply)
3.3
Determining System Power Requirements
3.4
Power Supply Filters
3.5
Power Supply Decoupling and Bulk Capacitors
3.5.1
Note on PDN target impedance
3.6
Power Supply Sequencing
3.7
Supply Diagnostics
3.8
Power Supply Monitoring
4
Clocking
4.1
System Clock Inputs
4.2
Unused Clock Inputs
4.3
Clock Output
4.4
Single-Ended Clock Sources
4.5
Crystal Selection
5
JTAG
5.1
JTAG / Emulation
5.1.1
Configuration of JTAG / Emulation
5.1.2
System Implementation of JTAG / Emulation
5.1.3
JTAG Termination
6
Device Configurations and Initialization
6.1
Device Reset
6.2
Latching of the Boot Modes
6.3
Watchdog Timer
7
Peripherals
7.1
Selecting Peripherals Across Functional Domains
7.2
Memory
7.2.1
Processor DDR Subsystem and Device Register Configuration
7.3
Media and Data Storage Interfaces
7.4
Ethernet Interface Using CPSW3G Common Platform Switch 3-port Gigabit Ethernet
7.5
Programmable Real-Time Unit Subsystem (PRUSS)
7.6
Universal Serial Bus (USB) Subsystem
7.7
General Connectivity
7.8
Display Subsystem (DSS)
7.9
Camera Subsystem (CSI)
7.10
Termination of Unused Peripherals and I/Os
7.10.1
EXTINTn
8
I/O Buffers and Termination
9
Power Consumption and Thermal Solutions
9.1
Power Consumption
9.2
Power Savings Modes
9.3
Guidance on Thermal Solution
10
Schematics Recommendations
10.1
Selection of Component and Component Values
10.2
Schematics Development
10.3
Reviewing the Schematics
10.4
Floor Planning of the PCB
11
Layout and Routing Guidelines
11.1
Escape Routing Guidelines
11.2
LPDDR4 Board Design and Layout Guidelines
11.3
High-Speed Differential Signal Routing Guidance
12
Device Handling and Assembly
13
References
14
Acronyms Used in This Document
13
References
Texas Instruments:
AM62Ax Sitara™ Processors Data Sheet
Texas Instruments:
AM62Ax Sitara Processors Technical Reference Manual
Texas Instruments:
AM62Ax Silicon Errata
Starter Kit SK-AM62A-LP EVM
Texas Instruments:
Thermal Design Guide for DSP and Arm Application Processors
Texas Instruments:
Hardware Design Guide for KeyStone II Devices
Texas Instruments:
Sitara Processor Power Distribution Networks: Implementation and Analysis
Texas Instruments:
Emulation and Trace Headers Technical Reference Manual
XDS Target Connection Guide
Texas Instruments:
AM62A Power Estimation Tool
Texas Instruments:
AM62Ax Escape Routing PCB Design Application note
Texas Instruments:
AM62Ax DDR Board Design and Layout Guidelines
Texas Instruments:
High-Speed Interface Layout Guidelines
Texas Instruments:
MSL Ratings and Reflow Profiles
Moisture sensitivity level search
Texas Instruments:
TIDA-01413 - ADAS 8-Channel Sensor Fusion Hub Reference Design
Texas Instruments:
Jacinto™ 7 DDRSS Register Configuration Tool