8 Routing Priority

As indicated earlier, critical interfaces affect component placement options. The next step in PCB design is to prioritize routing to these critical interfaces. Those with higher priority must be completed before implementing those of lower priority. It is imperative to route interface with the higher priority first. PCB layout teams often end up in a time intense, iterative process with sub optimal results when routing priorities are not established.

The table below lists a recommended priority order for interfaces contained on the AM62XSiP family of devices. Individual design requirements may drive a need for adjustment of the priorities but this serves as a good baseline and has been used for the board example illustrated in this document.

The multi-gigabit Camera Serial Interfaces (CSI) are the most critical due to their data rate and loss concerns. CSI is at the top of the priority list because it is very sensitive to PCB losses. The limited length for these routes might affect the PCB placement of the CSI connector and the AM62XSiP device. CSI signals are found on the outer layers of the BGA footprint allowing some of the CSI traces to escape from the BGA without vias.

The asynchronous and low speed interfaces are at the bottom. This leaves the synchronous and source-synchronous interfaces on the top ordered by data rate. The one surprise may be power distribution. It is often left to last. This then results in poor decoupling performance or current starvation and excessive power supply noise due to insufficient copper to carry the power and ground currents. Space for copper and decoupling must be allocated before routing the middle and low priority interfaces.