SPRUIU9B August   2020  – September 2022 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   Live Firmware Update Without Device Reset on C2000 MCUs
  2.   Trademarks
  3. 1Introduction
  4. 2Key Innovations
  5. 3Building Blocks for LFU
  6. 4Details of Proposed Solution
    1. 4.1 Flash Bank Organization
    2. 4.2 LFU Concepts and Factors Impacting Performance
    3. 4.3 Hardware Support for LFU
      1. 4.3.1 Multiple Flash Banks
      2. 4.3.2 Interrupt Vector Table Swap
      3. 4.3.3 RAM Block Swap
      4. 4.3.4 Hardware Register Flags
    4. 4.4 LFU Compiler Support
    5. 4.5 Application LFU Flow
  7. 5Results and Conclusion
  8. 6Revision History

RAM Block Swap

Similar to Vector Table Swap physical RAM memory blocks can be swapped as shown in Figure 4-3.

If physical memory Block 1 contains function pointers for the current firmware, then the same relative locations in physical memory of Block 2 can be populated with function pointers of the new firmware before LFU switchover. During LFU switchover, a simple swap operation is initiated by the user application code that takes just 1 CPU clock cycle. This allows user-application code to maintain function pointers in LS0, yet have two different physical blocks that map to the LS0 address range. After the swap, the physical RAM block previously mapped to the Block1 address space would now be mapped to the Block0 address space, and vice versa, enabling seamless function pointer access in the new firmware.

Figure 4-3 RAM Block Swap