TIDA035 October   2020

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Two-point Insulation Resistance Measurements
  5. 3Equation Verification by Simulation
  6. 4Op-amp Caused Error Analysis
    1. 4.1 Input offset voltage
    2. 4.2 Input bias current
    3. 4.3 Open-loop gain
  7. 5Summary
  8. 6References

Input offset voltage

The output of an ideal op-amp should be zero if the input voltage difference is zero. But the mismatch of differential input transistors of real op-amps causes the output to be zero at a non-zero value of differential input, which is known as input offset voltage.

It is assumed that the inverting input (–) voltage of the op-amp is equal to non-inverting input (+) in the above calculation. And the non-inverting input (+) is connected to the voltage reference Vref.

Once the input offset voltage is considered between the non-inverting input (+) and the inverting input (–), ISO_POS and ISO_NEG can take into account the input offset voltage from Equation 2 and Equation 5 respectively.

Equation 9. GUID-20201012-CA0I-ZRRT-M7XG-GCBXKPHVQKK2-low.gif
Equation 10. GUID-20201012-CA0I-GGSK-XZ6L-GG2TSVCVN47B-low.gif