SBAU435 February   2024 ADS127L18

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1  EVM Analog Input Options
    2. 2.2  Power Requirements
    3. 2.3  ADC Connections and Decoupling
    4. 2.4  ADC Input Amplifiers
    5. 2.5  VCOM Buffer
    6. 2.6  Voltage Reference
    7. 2.7  Reference Buffer
    8. 2.8  Clock Tree
    9. 2.9  Serial Interface
    10. 2.10 EEPROM
    11. 2.11 Power Supplies
    12. 2.12 Low Dropout Regulator (LDO)
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 ADS127L18 EVM Software Installation
  10. 4Implementation Results
    1. 4.1 EVM Operation
      1. 4.1.1 Evaluation Setup
      2. 4.1.2 Optional EVM Connections
      3. 4.1.3 EVM Register Settings
      4. 4.1.4 ADC Capture Settings
        1. 4.1.4.1 ADC Configuration
        2. 4.1.4.2 Clocking Configuration
        3. 4.1.4.3 SPI and Data Port Configuration
        4. 4.1.4.4 Filter Configuration
        5. 4.1.4.5 Channel Configuration
      5. 4.1.5 Time Domain Display
      6. 4.1.6 Spectral Analysis Display
      7. 4.1.7 Histogram Analysis Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Related Documentation
    1. 7.1 Supplemental Content

4.1.1 Evaluation Setup

Connect the EVM as shown in Figure 5-1 after installing the software:

  1. Physically connect P2 of the PHI to J1 of the ADS127L18 EVM. Install the included screws to provide a robust connection.
  2. Connect an external +6V, 0.5A lab supply to J7 or connect an AC power adapter rated for 6V, 0.5A to J6 such as SMI18-5.9-V-P5 or equivalent.
  3. Connect the USB connector on the PHI to the computer.
    1. LED D5 on the PHI lights up, indicating that the PHI is powered up.
    2. LEDs D1 and D2 on the PHI start blinking to indicate that the PHI is booted up and communicating with the PC; Figure 5-1 shows the resulting LED indicators.
  4. Start the software GUI as shown in Figure 5-2. Notice that the LEDs blink slowly when the FPGA firmware is loaded on the PHI. This loading takes a few seconds.
  5. Connect the differential signal generator. The full scale input range is ±2.5V differential and a common mode from 0V to 2.5V. A common input signal applied is a 4.8VPP signal. This signal is adjusted just below the full-scale range to avoid clipping.
GUID-20240108-SS0I-61WN-KJPF-3N94SC17VJWZ-low.svgFigure 4-1 Connecting the Hardware to the ADS127L18EVM
GUID-20240108-SS0I-ZLXS-QLRK-MB7LFRZQVQGF-low.svgFigure 4-2 Launch the ADS127L18EVM GUI Software