SBOK079 October   2023 TPS7H2140-SEP

PRODUCTION DATA  

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Single-Event Effects (SEE)
  6. 3 Device and Test Board Information
  7. 4 Irradiation Facility and Setup
  8. 5 Depth, Range, and LETEFF Calculation
  9. 6 Test Setup and Procedures
  10. 7 Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-up (SEL) Results
    2. 7.2 Single-Event Burnout (SEB) and Single-Event Gate Rupture (SEGR) Results
  11. 8 Single-Event Transients (SET)
  12. 9 Event Rate Calculations
  13. 10Summary
  14. 11References

3 Device and Test Board Information

The TPS7H2140-SEP is packaged in a 28-pin HTSSOP plastic package as shown in Figure 3-1. An evaluation board designed for radiation testing was used to evaluate the performance and characteristics of the TPS7H2140-SEP under heavy-ions. Figure 3-2 shows the top view of the evaluation board used for the radiation testing. Figure 3-3 shows the EVM board schematics used for the heavy-ion testing campaign.

GUID-20230914-SS0I-ZXFM-JCPK-C8PMNNBJSVF5-low.svg

The package was delidded to reveal the die face for all heavy-ion testing.

Figure 3-1 Photograph of Delidded TPS7H2140-SEP [Left] and Pinout Diagram [Right]
GUID-20230913-SS0I-4TKN-QVJ0-LG17HC0LQXQW-low.jpg Figure 3-2 TPS7H2140-SEP Board Top View
GUID-20230918-SS0I-WLK7-FDC2-V3WXSVJBT4KV-low.gif Figure 3-3 TPS7H2140-SEP SEE Validation EVM Schematic