SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Application Interrupt and Reset Control (APINT)
NOTE
This register can only be accessed from privileged mode.
The APINT register provides priority grouping control for the exception model, endian status for data accesses, and reset control of the system. To write to this register, 0x05FA must be written to the VECTKEY field, otherwise the write is ignored.
The PRIGROUP field indicates the position of the binary point that splits the INTx fields in the Interrupt Priority (PRIx) registers into separate group priority and subpriority fields. Table 2-29 shows how the PRIGROUP value controls this split. The bit numbers in the Group Priority Field and Subpriority Field columns in the table refer to the bits in the INTA field. For the INTB field, the corresponding bits are 15:13; for INTC, 23:21; and for INTD, 31:29.
Determining preemption of an exception uses only the group priority field.
| PRIGROUP Bit Field | Binary Point(1) | Group Priority Field | Subpriority Field | Group Priorities | Subpriorities |
|---|---|---|---|---|---|
| 0x0 to 0x4 | bxxx. | [7:5] | None | 8 | 1 |
| 0x5 | bxx.y | [7:6] | [5] | 4 | 2 |
| 0x6 | bx.yy | [7] | [6:5] | 2 | 4 |
| 0x7 | b.yyy | None | [7:5] | 1 | 8 |
APINT is shown in Figure 2-17 and described in Table 2-30.
Return to Summary Table.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| VECTKEY | |||||||
| R/W-0xFA05 | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| VECTKEY | |||||||
| R/W-0xFA05 | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| ENDIANESS | RESERVED | PRIGROUP | |||||
| R-0x0 | R-0x0 | R/W-0x0 | |||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | SYSRESREQ | VECTCLRACT | VECTRESET | ||||
| R-0x0 | W-0x0 | W-0x0 | W-0x0 | ||||