4.1.2.5 Brownout Reset (BOR)
The microcontroller provides a brownout detection circuit that triggers if the VDD (external) or VDDA (analog) power supply drops below its corresponding brownout threshold voltage. If a brownout condition is detected, the system may generate an interrupt, a system reset or a POR. The default value at reset is to generate an interrupt.
The application can identify the type of BOR event that occurred by reading the Power-Temperature Cause (PWRTC) register. The BOR detection circuits can be programmed to generate a reset, System Control interrupt, or NMI in the Power-Temp Brownout Control (PTBOCTL) register. The default settings at reset are:
- VDDA under BOR detection default setting is for no action to occur.
- VDD under BOR detection default setting is to execute a full POR.
If the user has programmed a field in the PTBOCTL register to generate a reset, then the BOR bit of the RESBEHAVCTL register can be programmed to further define what type of reset is generated:
- If the BOR field is set to 0x3, a full POR is initiated.
- If the BOR field is set to 0x2, then a system reset is issued.
- If the BOR field is set to 0x0 or 0x1, then the brownout detection circuit performs its default operation upon assertion, which is issuing an interrupt.
NOTE
VDDA BOR and VDD BOR events are a combined BOR to the system logic, such that if either BOR event occurs, the following bits are affected:
- BORRIS bit in the RIS register (see Section 4.2.4).
- BORMIS bit in the MISC register (see Section 4.2.6). This bit is set only if the BORIM bit in the Interrupt Mask Control (IMC) register has been set (see Section 4.2.5).
- BOR bit in the RESC register (see Section 4.2.7). This bit is set only if either of the BOR events have been configured to initiate a reset.
In addition, the following bits control both BOR events:
The brownout POR reset sequence is:
- When one of the BOR event triggers occurs, an internal BOR condition is set.
- If the BOR event has been programmed to generate a reset in the PTBOCTL register and the BOR bit of the RESBEHAVCTL has been set to 0x3, an internal POR reset is asserted.
- The internal reset is released and the core executes a full initialization of the device. Upon completion, the core loads from memory the initial stack pointer, the initial program counter, and the first instruction designated by the program counter, and then begins execution. The application starts after deassertion of internal POR. See the device-specific data sheet for BOR internal reset deassertion timing.
The brownout system reset sequence is:
- When one of the BOR event triggers occurs, an internal BOR condition is set.
- If the BOR event has been programmed to generate a reset in the PTBOCTL register and the BOR bit of the RESBEHAVCTL has been set to 0x2, an internal reset is asserted.
- The internal reset is released and the microcontroller fetches and loads the initial stack pointer, the initial program counter, the first instruction designated by the program counter
- Execution begins.
The result of a BOR is equivalent to that of an assertion of the external RST input, and the reset is held active until the proper voltage level is restored. The RESC register can be read in the reset interrupt handler to determine if a brownout condition was the cause of the reset, thus allowing software to determine which actions are required to recover.