SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Table 13-3 lists the memory-mapped registers for the CRC. All register offset addresses not listed in Table 13-3 should be considered as reserved locations and the register contents should not be modified.
The offset listed is a hexadecimal increment to the register's address, relative to the base address of 0x44030000.
NOTE
The CRC module can only be accessed through privileged mode. If the µDMA is used for CRC transfers, then the DMA Channel Control (DMACHCTL) register also needs to be programmed to allow for privileged accesses.
Offset | Acronym | Register Name | Section |
---|---|---|---|
400h | CRCCTRL | CRC Control | Section 13.4.1 |
410h | CRCSEED | CRC SEED/Context | Section 13.4.2 |
414h | CRCDIN | CRC Data Input | Section 13.4.3 |
418h | CRCRSLTPP | CRC Post Processing Result | Section 13.4.4 |
Complex bit access types are encoded to fit into small table cells. Table 13-4 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |