SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
I2C Slave ACK Control (I2CSACKCTL)
This register enables the I2C slave to NACK for invalid data or command or ACK for valid data or command. The I2C clock is pulled low after the last data bit until this register is written.
I2CSACKCTL is shown in Figure 19-39 and described in Table 19-29.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0x0 | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0x0 | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0x0 | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ACKOVAL | ACKOEN | |||||
R-0x0 | R/W-0x0 | R/W-0x0 | |||||