SLAU888 may   2023 AFE882H1

 

  1.   AFE882H1 Evaluation Module
  2.   Trademarks
  3. 1Overview
    1. 1.1 Kit Contents
    2. 1.2 Related Documentation From Texas Instruments
  4. 2System Setup
    1. 2.1 Software Setup
    2. 2.2 Hardware Setup
      1. 2.2.1 Electrostatic Discharge Caution
      2. 2.2.2 Power Configuration and Jumper Settings
      3. 2.2.3 Connecting the Hardware
        1. 2.2.3.1 Power Configuration
        2. 2.2.3.2 External SPI and UART Controllers
  5. 3Detailed Description
    1. 3.1 Hardware Description
      1. 3.1.1 Theory of Operation
      2. 3.1.2 Signal Definitions
      3. 3.1.3 XTR305 Configuration
    2. 3.2 Software Description
      1. 3.2.1 Starting the Software
      2. 3.2.2 Software Features
        1. 3.2.2.1 High Level Configuration Page
        2. 3.2.2.2 AFE882H1 Register Page
  6. 4Schematics, PCB Layout, and Bill of Materials
    1. 4.1 Board Schematic
    2. 4.2 PCB Components Layout
    3. 4.3 Bill of Materials

2.2.2 Power Configuration and Jumper Settings

The AFE882H1EVM provides electrical connections to the device supply pins. Table 2-1 shows the connections.

Table 2-1 summarizes all of the EVM jumper functionality.

Table 2-1 AFE882H1EVM Power Supply Inputs
Terminal Name Function
J7 +15V External +15-V supply for XTR305 V+ (required for XTR305)
J8 –15V External –15-V supply for XTR305 V– (required for XTR305)
J22 PVDD Optional external PVDD power supply (disconnect J26 when using external supply)
J23 GND Ground connection
J24 IOVDD Optional external IOVDD power supply (disconnect J27 when using external supply)

The jumper settings on the AFE882H1EVM are crucial to the proper operation of the EVM. Table 2-2 provides the details of the configurable jumper settings on the EVM. Figure 2-3 defines the AFE882H1EVM show the default jumper connections on the board.

Table 2-2 AFE882H1EVM Jumper Summary
Header Name Function
J3 POL_SEL

Short 1-2 – POL_SEL set alarm voltage high (default)

Short 2-3 – POL_SEL set alarm voltage low
J4 HART_IN

Short 1-2 – HART receiver input set to internal filter (default)

Short 2-3 – HART receiver input set to external filter
J5 REF_EN

Short 1-2 – REF_EN connected to ground, disable internal reference

Open – REF_EN connected to IOVDD through pullup resistor, enable internal reference (default)
J6 RX_INF

Short 1-2 – RX_IN connected to 680 pF for internal filter (default)

Short 2-3 – RX_INF set to external filter
J19 XTR_OD

Short 1-2 – XTR output disable controlled by GUI (default)

Short 2-3 – XTR output hard enabled

Open – XTR output disabled
J20 XTR_LOAD

Short 1-2 – XTR output load set to 249 Ω

Short 3-4 – XTR output load set to 100 Ω

Short 5-6 – XTR output load set to 1 µF

Open – XTR output load unconnected (default)
J21 XTR_M2

Short 1-2 – XTR voltage or current output selection controlled by GUI (default)

Short 2-3 – XTR set to current output

Open – XTR set to voltage output

J25 DISABLE

Short 1-2 – FTDI SPI level shifter disabled

Open 1-2 – FTDI SPI level shifter enabled (default)

Short 3-4 – FTDI UART level shifter disabled

Open 3-4 – FTDI UART level shifter enabled (default)

Short 5-6 – FTDI RESET level shifter disabled

Open 5-6 – FTDI RESET level shifter enabled (default)
J26 PVDD

Short 1-2 – PVDD supplied through USB power (default)

Open – PVDD supplied through J22
J27 IOVDD

Short 1-2 – IOVDD supplied through 3.3-V USB power

Short 2-3 – IOVDD supplied through 1.8-V USB power (default)

Open – IOVDD supplied through J24
GUID-20221013-SS0I-ZGPG-QMZK-LVZDK3KV4JWN-low.svg Figure 2-3 Default Header Settings for the AFE882H1EVM