SLUSAK9B September 2011 – April 2015 BQ24735
PRODUCTION DATA.
The switching node rise and fall times should be minimized for minimum switching loss. Proper layout of the components to minimize high-frequency current path loop (see Figure 25) is important to prevent electrical and magnetic field radiation and high-frequency resonant problems. The following procedure shows a PCB layout priority list for proper layout. Layout PCB according to this specific order is essential.
See the EVM design for the recommended component placement with trace and via locations. For the QFN information, see SCBA017 and SLUA271.
To prevent unintentional charger shut down in normal operation, MOSFET RDS(on) selection and PCB layout is very important. Figure 23 shows a improvement PCB layout example and its equivalent circuit. In this layout, the system current path and charger input current path is not separated, as a result, the system current causes voltage drop in the PCB copper and is sensed by the IC. The worst layout is when a system current pull point is after charger input; as a result all system current voltage drops are counted into overcurrent protection comparator. The worst case for IC is when the total system current and charger input current sum equals the DPM current. When the system pulls more current, the charger IC tries to regulate the RAC current as a constant current by reducing the charging current.
Figure 24 shows the optimized PCB layout example. The system current path and charge input current path is separated, and as a result, the IC only senses charger input current caused PCB voltage drop and minimized the possibility of unintentional charger shutdown in normal operation. This also makes PCB layout easier for high system current application.
The total voltage drop sensed by IC can be expressed as the following equation:
where
Here, the PCB factor k = 0 means the best layout shown in Figure 24, where the PCB trace only goes through charger input current, while k = 1 means the worst layout shown in Figure 23, where the PCB trace goes through all the DPM current. The total voltage drop must below the high-side short-circuit protection threshold to prevent unintentional charger shutdown in normal operation.
The low-side MOSFET short circuit voltage drop threshold can be adjusted through SMBus command. ChargeOption() bit [7] =0, 1 sets the low-side threshold, 135 mV and 230 mV, respectively. The high-side MOSFET short circuit voltage drop threshold can be adjusted through SMBus command. ChargeOption() bit [8] = 0, 1 disables the function and set the threshold, 750 mV, respectively. For a fixed PCB layout, host should set proper short-circuit protection threshold level to prevent unintentional charger shutdown in normal operation.