SLVAFJ8 may   2023 TPS7H5001-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2System Design Theory
    1. 2.1  Switching Frequency
    2. 2.2  Leading Edge Blanking
    3. 2.3  Dead Time
    4. 2.4  Enable and UVLO
    5. 2.5  Output Voltage Programing
    6. 2.6  Soft Start
    7. 2.7  Sensing Circuit
    8. 2.8  FAULT Mode
    9. 2.9  HICCUP Mode
    10. 2.10 Slope Compensation
    11. 2.11 Output Capacitance
    12. 2.12 Compensation
  6. 3Test Results
  7. 4Bill of Materials
  8. 5Schematics
  9. 6PCB Layouts
  10. 7References

2.3 Dead Time

The TPS7H5001-SP allows for the user to program two independent dead times. This allows for the dead times to be optimized by the user to prevent shoot-through between the primary and synchronous switches while attaining the best possible converter efficiency. The equation for determining the values of and for a desired dead time is shown in Equation 4.

Equation 4. RPS=RSP= 1.207 x DT-8.858=1.207 x 25 ns-8.858=21.3 kΩ