1 Introduction

The TPS7H5001-SP EVM uses the TPS7H5001-SP and LMG1210 to create a synchronous buck with error amplification, current sensing and overcurrent protection. The design converts a 12 V rail into a 0.8 V rail meant for high current FPGA designs, and is created to meet the tight regulation requirements that FGPA core voltage rails require. The TPS7H5001-SP is used to switch the FET’s of the synchronous buck and provides voltage and current to the output. Due to the roughly 150-mA peak current capability of the TPS7H5001’s primary switching outputs, the LMG1210 gate driver is used to amplify the current to provide the FET’s of the synchronous buck with sufficient current. The system uses the TPS7H5001-SP to generate a 80-A output. These outputs are not dependent on the TPS7H5001-SP itself, and can be increased or decreased depending on the design. The full design was created as part of a testing platform and spans across 3 seperate boards. There is a controller card with the TPS7H5001-SP, a daughter card with the powerstage, and a motherboard with large capacitance. The design is meant to show the feasibility of the system, and is not optimized for size.