SPRADG4A January   2024  – April 2024

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  5. 2Introduction
  6. 3System Description
    1. 3.1 Key System Specifications
  7. 4System Overview
    1. 4.1 Block Diagram
    2. 4.2 Basic Operation
    3. 4.3 System Design Theory
      1. 4.3.1 Peak Current Mode Control (PCMC) Implementation
      2. 4.3.2 Zero Voltage Switching (ZVS) or Low Voltage Switching (LVS)
      3. 4.3.3 Synchronous Rectification
      4. 4.3.4 Slope Compensation
  8. 5Hardware
    1. 5.1 Hardware Overview
    2. 5.2 Hardware and Test Instruments Required
    3. 5.3 TMDSCNCD263 controlCARD™ Changes
  9. 6Software
    1. 6.1 Getting Started With Firmware
      1. 6.1.1 Opening the Code Composer Studio Project
      2. 6.1.2 Software Architecture
      3. 6.1.3 Project Folder Structure
    2. 6.2 SysConfig Setup
      1. 6.2.1 EPWM Configuration
      2. 6.2.2 ADC Configuration
      3. 6.2.3 CMPSS Configuration
    3. 6.3 Incremental Builds
      1. 6.3.1 Procedure for Running the Incremental Builds - PCMC
        1. 6.3.1.1 Lab 1: Phase Overlapping Check With Open Current and Voltage Loop
          1. 6.3.1.1.1 Objective of Lab 1
          2. 6.3.1.1.2 Overview of Lab 1
          3. 6.3.1.1.3 Procedure of Lab 1
            1. 6.3.1.1.3.1 Start CCS and Open a Project for Lab 1
            2. 6.3.1.1.3.2 Build and Load the Project for Lab 1
            3. 6.3.1.1.3.3 Debug Environment Windows for Lab 1
            4. 6.3.1.1.3.4 Run the Code for Lab 1
        2. 6.3.1.2 Lab 2: Closed Current and Open Voltage Loop
          1. 6.3.1.2.1 Objective of Lab 2
          2. 6.3.1.2.2 Overview of Lab 2
          3. 6.3.1.2.3 Procedure of Lab 2
            1. 6.3.1.2.3.1 Build and Load Project for Lab 2
            2. 6.3.1.2.3.2 Debug Environment Windows for Lab 2
            3. 6.3.1.2.3.3 Run the Code for Lab 2
        3. 6.3.1.3 Lab 3: Closed Current and Closed Voltage Loop
          1. 6.3.1.3.1 Objective of Lab 3
          2. 6.3.1.3.2 Overview of Lab 3
          3. 6.3.1.3.3 Procedure of Lab 3
            1. 6.3.1.3.3.1 Build and Load Project for Lab 3
            2. 6.3.1.3.3.2 Debug Environment Windows for Lab 3
            3. 6.3.1.3.3.3 Run the Code for Lab 3
  10. 7Testing and Results
    1. 7.1 Lab 0: Basic PWM Check
    2. 7.2 Lab 1: Phase Overlapping Check With Open Current and Voltage Loop
    3. 7.3 Lab 2: Closed Current and Open Voltage Loop
    4. 7.4 Lab 3: Closed Current and Closed Voltage Loop
  11. 8References
  12. 9Revision History

6.2.1 EPWM Configuration

PWMs are one of the core parts of the software configuration for the inverter. The PWM module of AM263x inherited features from TI classic C28 controllers. A total of six PWM channels are needed to control the inverter output.

Two EPWM instances are created for controlling the two legs of the HV side: PSFB_FB_PWM1, PSFB_FB_PWM2. PSFB_SR_PWM is created to control the SR switches of the LV side. PSFB_ADC_OVERSAMPLING_PWM is created to generate EPWMSYNCPER signal form CMPSS module. The EPWM peripheral clock is running at 200MHz. PSFB_FB_PWM1, PSFB_FB_PWM2 and PSFB_SR_PWM are configured for 100kHz frequency at Up-Down Count mode. PSFB_ADC_OVERSAMPLING_PWM is configured for 200kHz frequency at Up Count mode.

Equation 1. T i m e   B a s e   P e r i o d   f o r   U p - D o w n   C o u n t   M o d e = E P W M C L K H S P C L K × C L K D I V 2 × R e q F r e q = 50 M H z 100 k H z = 500
Equation 2. T i m e   B a s e   P e r i o d   f o r   U p   C o u n t   M o d e = E P W M C L K H S P C L K × C L K D I V R e q F r e q = 100 M H z 200 k H z = 500

From Equation 1, Time base Period of PSFB_FB_PWM1, PSFB_FB_PWM2, PSFB_SR_PWM is 500, when the High-Speed Clock divider is 1 and Time Base Clock divider. From Equation 2, the Time base Period of PSFB_ADC_OVERSAMPLING_PWM is also 500, when the High-Speed Clock divider is 1 and Time Base Clock divider. Only PWM instance assignment was done using SysConfig. PSFB_FB_PWM1, PSFB_FB_PWM2. PSFB_SR_PWM and PSFB_ADC_OVERSAMPLING_PWM have been assigned to EPWM4, EPWM3, EPWM5 and EPWM2, respectively. All the other PWM related configurations as discussed in Section 4.3.1 and Section 4.3.3 are done in PSFB_HAL_setupPwms() inside main().