SPRS880P December 2013 – February 2024 TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28377D-Q1 , TMS320F28378D , TMS320F28379D , TMS320F28379D-Q1
PRODUCTION DATA
The EMIF1 memory map is the same for both CPU subsystems. EMIF2 is available only on the CPU1 subsystem. The EMIF memory map is shown in Table 7-4.
EMIF CHIP SELECT | SIZE(2) | START ADDRESS | END ADDRESS | CLA ACCESS | DMA ACCESS |
---|---|---|---|---|---|
EMIF1_CS0n - Data | 256M × 16 | 0x8000 0000 | 0x8FFF FFFF | Yes | |
EMIF1_CS2n - Program + Data(3) | 2M × 16 | 0x0010 0000 | 0x002F FFFF | Yes | |
EMIF1_CS3n - Program + Data | 512K × 16 | 0x0030 0000 | 0x0037 FFFF | Yes | |
EMIF1_CS4n - Program + Data | 393K × 16 | 0x0038 0000 | 0x003D FFFF | Yes | |
EMIF2_CS0n - Data(1) | 32M × 16 | 0x9000 0000 | 0x91FF FFFF | ||
EMIF2_CS2n - Program + Data(1) | 4K × 16 | 0x0000 2000 | 0x0000 2FFF | Yes (Data only) |